ZHCSFF4C February 2016 – August 2021 TPS65981
PRODUCTION DATA
The external FET path allows for the maximum PD power profile (20 V at 5 A) and design considerations must be taken into account for choosing the appropriate components to optimize performance.
Although a Type C PD charger will be providing power there could be a condition where a non-compliant device can be connected to the charger and force voltage back into the charger. To protect against this the external FET path detects reverse current in both directions of the current path. The TPS65981 uses two back-to-back NFETs to protect both sides of the system. Another design consideration is to rate the external NFETs above the Type C and PD specification maximum which is 20 V. In this specific design example, 30-V NFETs are used that have an average combined source-to-source on-resistance RSS,ON of 9.3 mΩ to reduce losses. The CSD87501L is recommended.
The TPS65981 supports either a 10-mΩ or a 5-mΩ sense resistor on the external FET path. This RSENSE resistor is used for current limiting and is used for the reverse current protection of the power path. A 5 mΩ sense resistor is used in the design to minimize losses and I-R voltage drop. Recommended NFET Capabilities summarizes the recommended parameters for the external NFET used. The total voltage drop seen across RSENSE and the external NFET could be determined by Equation 5. The drop in the entire system must be considered and regulated accordingly to ensure that the output voltage is within the specification. Use Equation 6 to calculate the power lost through the external FET path.
| VOLTAGE RATING | CURRENT RATING | RDS,ON , RSS,ON |
|---|---|---|
| 30 V (minimum) | 10 A (peak current) | < 10 mΩ, < 20 mΩ |