ZHCSG44G June 2017 – January 2025 TPS650864
PRODUCTION DATA
When power supply at the VSYS pin is less than VSYS_UVLO_5V (5.4V nominal) + VSYS_UVLO_5V_HYS (0.2V nominal), the device is in off mode, where all output rails are disabled. If the supply voltage is greater than VSYS_UVLO_3V (3.6V nominal) + VSYS_UVLO_3V_HYS (0.15V nominal) while it is still less than VSYS_UVLO_5V + VSYS_UVLO_5V_HYS, then the internal band-gap reference (VREF pin) along with LDO3P3 are enabled and regulated at target values.