ZHCSI15L June 2006 – May 2018 TPS65023 , TPS65023B
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Electrical Characteristics: Supply Pins VCC, VINDCDC1, VINDCDC2, VINDCDC3
- 6.7 Electrical Characteristics: Supply Pins VBACKUP, VSYSIN, VRTC, VINLDO
- 6.8 Electrical Characteristics: VDCDC1 Step-Down Converter
- 6.9 Electrical Characteristics: VDCDC2 Step-Down Converter
- 6.10 Electrical Characteristics: VDCDC3 Step-Down Converter
- 6.11 I2C Timing Requirements for TPS65023B
- 6.12 Typical Characteristics
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 VRTC Output and Operation With or Without Backup Battery
- 7.3.2 Step-Down Converters, VDCDC1, VDCDC2, and VDCDC3
- 7.3.3 Power Save Mode Operation
- 7.3.4 Low Ripple Mode
- 7.3.5 Soft-Start
- 7.3.6 100% Duty Cycle Low Dropout Operation
- 7.3.7 Active Discharge When Disabled
- 7.3.8 Power-Good Monitoring
- 7.3.9 Low-Dropout Voltage Regulators
- 7.3.10 Undervoltage Lockout
- 7.3.11 Power-Up Sequencing
- 7.4 Device Functional Modes
- 7.5 Programming
- 7.6
Register Maps
- 7.6.1 VERSION Register Address: 00h (Read Only)
- 7.6.2 PGOODZ Register Address: 01h (Read Only)
- 7.6.3 MASK Register Address: 02h (Read and Write), Default Value: C0h
- 7.6.4 REG_CTRL Register Address: 03h (Read and Write), Default Value: FFh
- 7.6.5 CON_CTRL Register Address: 04h (Read and Write), Default Value: B1h
- 7.6.6 CON_CTRL2 Register Address: 05h (Read and Write), Default Value: 40h
- 7.6.7 DEFCORE Register Address: 06h (Read and Write), Default Value: 14h/1Eh
- 7.6.8 DEFSLEW Register Address: 07h (Read and Write), Default Value: 06h
- 7.6.9 LDO_CTRL Register Address: 08h (Read and Write), Default Value: Set with DEFLDO1 and DEFLDO2
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- RSB|40
散熱焊盤機械數據 (封裝 | 引腳)
- RSB|40
訂購信息
8.2.2.4 Output Voltage Selection
The DEFDCDC1, DEFDCDC2, and DEFDCDC3 pins are used to set the output voltage for each step-down converter. See Table 20 for the default voltages if the pins are pulled to GND or to VCC. If a different voltage is needed, an external resistor divider can be added to the DEFDCDCx pin as shown in Figure 41.
The output voltage of VDCDC1 is set with the I2C interface. If the voltage is changed from the default, using the DEFCORE register, the output voltage only depends on the register value. Any resistor divider at DEFDCDC1 does not change the voltage set with the register.
Table 20. DCDC1, DCDC2, and DCDC3 Default Voltage Levels
| PIN | LEVEL | DEFAULT OUTPUT VOLTAGE |
|---|---|---|
| DEFDCDC1 | VCC | 1.6 V |
| GND | 1.2 V | |
| DEFDCDC2 | VCC | 3.3 V |
| GND | 1.8 V | |
| DEFDCDC3 | VCC | 3.3 V |
| GND | 1.8 V |
Using an external resistor divider at DEFDCDCx:
Figure 41. External Resistor Divider When a resistor divider is connected to DEFDCDCx, the output voltage can be set from 0.6 V up to the input voltage V(bat). The total resistance (R1 + R2) of the voltage divider must be kept in the 1-MR range to maintain a high efficiency at light load.
V(DEFDCDCx) = 0.6 V
