ZHCSM66 March 2022 TPS629206-Q1
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Mode Selection and Device Configuration (MODE/S-CONF Pin)
- 8.3.2 Adjustable VO Operation (External Voltage Divider)
- 8.3.3 Selectable VO Operation (VSET and Internal Voltage Divider)
- 8.3.4 Smart Enable with Precise Threshold
- 8.3.5 Power Good (PG)
- 8.3.6 Output Discharge Function
- 8.3.7 Undervoltage Lockout (UVLO)
- 8.3.8 Current Limit and Short Circuit Protection
- 8.3.9 Thermal Shutdown
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DRL|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
8.4.1 Forced Pulse Width Modulation (PWM) Operation
The TPS629206-Q1 has two operating modes: forced PWM mode discussed in this section and auto PFM/PWM mode as discussed in Section 8.4.2.
With the MODE/S-CONF pin set to forced PWM mode, the device operates with pulse width modulation in continuous conduction mode (CCM) with a nominal switching frequency of either 1.0 MHz or 2.5 MHz. The frequency variation in PWM is controlled and depends on VIN, VOUT, and the inductance. The on time in forced PWM mode is given by Equation 3.
For very small output voltages, an absolute minimum on time of about 40 ns is kept to limit switching losses. The operating frequency is thereby reduced from its nominal value, which keeps efficiency high.