ZHCSLJ2B September 2020 – July 2021 TPS62868 , TPS62869
PRODUCTION DATA
During the enable delay (tDelay), the start-up output voltage and device I2C target address are set by an external resistor connected to the VSET/VID pin through an internal R2D (resistor to digital) converter. Table 8-1 shows the options.
| RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/VID | START-UP OUTPUT VOLTAGE (TYP) | I2C TARGET ADDRESS |
|---|---|---|
| 249 kΩ | Voltage Factor * 1.15 V | 0b1000110 (0x46) |
| 205 kΩ | Voltage Factor * 1.10 V | 0b1000101 (0x45) |
| 162 kΩ | Voltage Factor * 1.05 V | 0b1000100 (0x44) |
| 133 kΩ | Voltage Factor * 1.00 V | 0b1000011 (0x43) |
| 105 kΩ | Voltage Factor * 0.95 V | 0b1000010 (0x42) |
| 86.6 kΩ | Voltage Factor * 0.90 V | 0b1000001 (0x41) |
| 68.1 kΩ | Voltage Factor * 0.85 V | 0b1001000 (0x48) |
| 56.2 kΩ | Voltage Factor * 0.80 V | 0b1001001 (0x49) |
| 44.2 kΩ | Voltage Factor * 0.75 V | 0b1001010 (0x4A) |
| 36.5 kΩ | Voltage Factor * 0.70 V | 0b1001011 (0x4B) |
| 28.7 kΩ | Voltage Factor * 0.65 V | 0b1001100 (0x4C) |
| 23.7 kΩ | Voltage Factor * 0.60 V | 0b1001101 (0x4D) |
| 18.7 kΩ | Voltage Factor * 0.55 V | 0b1001110 (0x4E) |
| 15.4 kΩ | Voltage Factor * 0.50 V | 0b1001111 (0x4F) |
| 12.1 kΩ | Voltage Factor * 0.45 V | 0b1000000 (0x40) |
| 10 kΩ | Voltage Factor * 0.40 V | 0b1000111 (0x47) |
| DEVICE OPTION | VOLTAGE FACTOR |
|---|---|
| TPS6286x0A | 0.5 |
| TPS6286x1A | 1 |
| TPS6286x2A | 2 |
The R2D converter has an internal current source which applies current through the external resistor, and an internal ADC which reads back the resulting voltage level. Depending on the level, the correct start-up output voltage and I2C target address are set. Once this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Ensure that there is no additional current path or capacitance greater than 30 pF from this pin to GND during R2D conversion, otherwise a false value is set.