ZHCSNV7A March 2020 – December 2021 TPS62816-Q1
PRODUCTION DATA
The TPS62816-Q1 follows the voltage applied to the SS/TR pin. A voltage ramp on SS/TR to 0.6 V ramps the output voltage according to the 0.6-V feedback voltage.
Tracking the 3.3 V of the primary device such that both rails reach their target voltage at the same time, requires a resistor divider on SS/TR of the secondary device equal to the output voltage divider of the primary device. The output current of 10 μA on the SS/TR pin causes an offset voltage on the resistor divider formed by R5 and R6. The equivalent resistance of R5 // R6 must therefore be kept below 4 kΩ. The current from SS/TR causes a slightly higher voltage across R6 than 0.6 V, which is desired because the secondary device switches to its internal reference as soon as the voltage at SS/TR is higher than 0.6 V.
In case both devices need to run in forced PWM mode, it is recommended to tie the MODE pin of the secondary device to the output voltage or the power good signal of the primary device. The TPS62816-Q1 has a duty cycle limitation defined by the minimum on time. For tracking down to low output voltages, the secondary device cannot follow once the minimum duty cycle is reached. Enabling PFM mode while tracking is in progress allowsthe user to ramp down the output voltage close to 0 V.