SLVSB35C October 2012 – July 2015 TPS62175 , TPS62177
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
-
9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Application
- 9.3 System Examples
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Pin voltage(2) | VIN | –0.3 | 30 | V |
| EN, SW | –0.3 | VIN + 0.3 | ||
| FB, PG, VOS, SLEEP, NC | –0.3 | 7 | ||
| Power good sink current | PG | 10 | mA | |
| Temperature | Operating junction temperature, TJ | –40 | 125 | °C |
| Storage temperature, Tstg | –65 | 150 | ||
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) All voltages are with respect to network ground terminal.
7.2 ESD Ratings
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V | |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 | ||||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Supply voltage, VIN | 4.75 | 28 | V | |||
| Operating free air temperature, TA | –40 | 85 | °C | |||
| Operating junction temperature, TJ | –40 | 125 | °C | |||
7.4 Thermal Information
| THERMAL METRIC(1) | TPS6217x | UNIT | |
|---|---|---|---|
| DQC [WSON] | |||
| 10 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 61.6 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 65.5 | °C/W |
| RθJB | Junction-to-board thermal resistance | 22.5 | °C/W |
| ψJT | Junction-to-top characterization parameter | 1.4 | °C/W |
| ψJB | Junction-to-board characterization parameter | 22.4 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 5.3 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
Over free-air temperature range (TA = –40°C to 85°C) and VIN = 4.75 V to 28 V. Typical values at VIN = 12 V and TA = 25°C (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||||
|---|---|---|---|---|---|---|---|---|---|
| SUPPLY | |||||||||
| VIN | Input voltage range | 4.75 | 28 | V | |||||
| IQ | Operating quiescent current | EN = High, SLEEP = High, IOUT = 0 mA, device not switching | 22 | 36 | µA | ||||
| IQ_SLEEP | Sleep mode quiescent current | EN = High, SLEEP = Low, IOUT = 0 mA, device not switching | 4.8 | 10 | µA | ||||
| ISD | Shutdown current | EN = Low, current into VIN pin | 1.5 | 5 | µA | ||||
| VUVLO | Undervoltage lockout threshold | Rising input voltage | 4.5 | 4.6 | 4.7 | V | |||
| Falling input voltage | 2.9 | V | |||||||
| TSD | Thermal shutdown temperature | Rising junction temperature | 150 | °C | |||||
| Thermal shutdown hysteresis | 20 | ||||||||
| CONTROL (EN, PG, SLEEP) | |||||||||
| VH | High level input threshold voltage (EN, SLEEP) | 0.9 | V | ||||||
| VL | Low level input threshold voltage (EN, SLEEP) | 0.3 | V | ||||||
| ILKG_EN | Input leakage current (EN) | EN = VIN | 5 | 300 | nA | ||||
| ILKG_SLEEP | Input leakage current (SLEEP) | VSLEEP = 3.3 V | 1.4 | µA | |||||
| VTH_PG | Power good threshold voltage | Rising (%VOUT) | 93% | 96% | 99% | ||||
| Falling (%VOUT) | 87% | 90% | 93% | ||||||
| VOL_PG | Power good output low voltage | IPG = –2 mA | 0.3 | V | |||||
| ILKG_PG | Input leakage current (PG) | VPG = 5 V | 5 | 300 | nA | ||||
| POWER SWITCH | |||||||||
| RDS(ON) | High-side MOSFET ON-resistance | VIN ≥ 6 V | 850 | 1430 | mΩ | ||||
| Low-side MOSFET ON-resistance | VIN ≥ 6 V | 320 | 530 | mΩ | |||||
| ILIMF | High-side MOSFET current limit | Normal operation | 800 | 1000 | 1200 | mA | |||
| Start-up mode | 450 | 525 | 600 | ||||||
| OUTPUT | |||||||||
| VOUT | Output voltage range (TPS62175) | VIN ≥ VOUT | 1 | 6 | V | ||||
| VREF | Internal reference voltage | 0.8 | V | ||||||
| IOUT_SLEEP | Output current in sleep mode | SLEEP = Low, VOUT = 3.3 V, L = 10 µH | 15 | mA | |||||
| ILKG_FB | Input leakage current (FB) | VFB = 0.8 V | 1 | 100 | nA | ||||
| VOUT | Output voltage accuracy(1) | TPS62175 (adjustable VOUT), VIN ≥ VOUT +1 V | PWM mode | –1.8% | 1.8% | ||||
| Power save mode, L = 10 µH | VOUT ≥ 2.5 V, COUT = 22 µF | –1.8% | 3% | ||||||
| VOUT < 2.5 V, COUT = 44 µF | –1.8% | 3.7% | |||||||
| Sleep mode, IOUT ≤ 15 mA | COUT = 22 µF, L = 10 µH | –1.6% | 2.9% | ||||||
| TPS62177 (3.3 V fixed VOUT) | PWM mode | –2% | 2% | ||||||
| Power save mode, | COUT = 22 µF, L = 10 µH | –2% | 2.9% | ||||||
| Sleep mode, IOUT ≤ 15 mA | –1.6% | 2.7% | |||||||
| Output discharge resistance | EN = Low | 175 | Ω | ||||||
| Load regulation | VOUT = 3.3 V, PWM mode operation | 0.02 | %/A | ||||||
| Line regulation | VOUT = 3.3 V, IOUT= 500 mA, PWM mode operation | 0.015 | %/V | ||||||
(1) The output voltage accuracy in Power Save and Sleep Mode can be improved by increasing the output capacitor value, reducing the output voltage ripple (see Application and Implementation section).
7.6 Typical Characteristics
