ZHCSFI8C June 2016 – June 2021 TPS62135
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3 Feature Description
- 9.4
Device Functional Modes
- 9.4.1 Pulse Width Modulation (PWM) Operation
- 9.4.2 Power Save Mode Operation (PWM/PFM)
- 9.4.3 100% Duty-Cycle Operation
- 9.4.4 HICCUP Current Limit And Short Circuit Protection (TPS62135 only)
- 9.4.5 Current Limit And Short Circuit Protection (TPS621351 only)
- 9.4.6 Soft-Start / Tracking (SS/TR)
- 9.4.7 Output Discharge Function (TPS62135 only)
- 9.4.8 Starting into a Pre-Biased Load (TPS621351 only)
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGX|11
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
9.4.3 100% Duty-Cycle Operation
The duty cycle of the buck converter operated in PWM mode is given as D = VOUT/VIN. The duty cycle increases as the input voltage comes close to the output voltage and the off-time gets smaller. When the minimum off-time of typically 80ns is reached, TPS62135 scales down its switching frequency while it approaches 100% mode. In 100% mode it keeps the high-side switch on continuously. The high-side switch stays turned on as long as the output voltage is below the internal set point. This allows the conversion of small input to output voltage differences, for example for longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.
The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as:
where:
IOUT is the output current,
RDS(on) is the on-state resistance of the high-side FET and
RL is the DC resistance of the inductor used.