11.1 Layout Guidelines
An example of a proper layout for the TPS5420x is shown in Figure 50.
- Creating a large GND plane for good electrical and thermal performance is important.
- The VIN and GND traces should be as wide as possible to reduce trace impedance. The added width also provides excellent heat dissipation.
- Thermal vias can be used to connect the topside GND plane to additional printed-circuit board (PCB) layers for heat dissipation and grounding.
- The input capacitors must be located as close as possible to the VIN pin and the GND pin.
- The SW trace must be kept as short as possible to minimize radiated noise and EMI.
- Do not allow switching current to flow under the device.
- The FB trace should be kept as short as possible and placed away from the high-voltage switching trace and the ground shield.
- In higher-current applications, routing the load current of the current-sense resistor to the junction of the input capacitor and GND node may be necessary.