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ZHCSCL8 July 2014 TPS54060-EP

PRODUCTION DATA.

封裝選項(xiàng)

7 Specifications

7.1 Absolute Maximum Ratings⁽¹⁾

over operating temperature range (unless otherwise noted)

		MIN	MAX	UNIT
Input voltage	VIN	–0.3	65	V
	EN	–0.3	5
	BOOT		75
	VSENSE	–0.3	3
	COMP	–0.3	3
	PWRGD	–0.3	6
	SS/TR	–0.3	3
	RT/CLK	–0.3	3.6
Output voltage	BOOT-PH		8	V
	PH	–0.6	65
	PH, 10-ns transient	–2	65
Voltage difference	PAD to GND	–200	200	mV
Source current	EN		100	μA
	BOOT		100	mA
	VSENSE		10	μA
	PH	Current limit		A
	RT/CLK		100	μA
Sink current	VIN	Current limit		A
	COMP		100	μA
	PWRGD		10	mA
	SS/TR		200	μA
Operating junction temperature		–55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 Handling Ratings

			MIN	MAX	UNIT
T_stg	Storage temperature range		–65	150	°C
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	–1000	1000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	–500	500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
T_A	Ambient temperature	–55	125	°C
T_J	Junction temperature	–55	150	°C
V_(VIN)		3.5	60	V

7.4 Thermal Information

THERMAL METRIC⁽¹⁾⁽²⁾		TPS54060	UNIT
THERMAL METRIC⁽¹⁾⁽²⁾		DGQ (10 PINS)	UNIT
R_θ_JA	Junction-to-ambient thermal resistance (standard board)	62.5	°C/W
R_θ_JA	Junction-to-ambient thermal resistance (custom board)⁽³⁾	57
R_θ_JC(top)	Junction-to-case (top) thermal resistance	83
R_θ_JB	Junction-to-board thermal resistance	28
ψ_JT	Junction-to-top characterization parameter	1.7
ψ_JB	Junction-to-board characterization parameter	20.1
R_θ_JC(bot)	Junction-to-case (bottom) thermal resistance	21

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) Power rating at a specific ambient temperature T_A should be determined with a junction temperature of 150°C. This is the point where distortion starts to substantially increase. See power dissipation estimate in application section of this data sheet for more information.

(3) Test boards conditions:

3 inches × 3 inches, 2 layers, thickness: 0.062 inch
2-oz. copper traces located on the top of the PCB
2-oz. copper ground plane, bottom layer
6 thermal vias (13 mil) located under the device package

7.5 Electrical Characteristics

T_J = –55°C to 150°C, VIN = 3.5 to 60 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (VIN PIN)
	Operating input voltage		3.5		60	V
	Internal UVLO threshold	No voltage hysteresis, rising and falling		2.5		V
	Shutdown supply current	V_(EN) = 0 V, 3.5 V ≤ V_(VIN) ≤ 60 V		1.3	8	μA
	Operating: nonswitching supply current	V_(VSENSE) = 0.83 V, V_(VIN) = 12 V		116	150	μA
ENABLE AND UVLO (EN PIN)
	Enable threshold voltage	No voltage hysteresis, rising and falling	0.9	1.25	1.6	V
	Input current	Enable threshold 50 mV		–3.8		μA
	Input current	Enable threshold –50 mV		–0.9		μA
	Hysteresis current			–2.9		μA
VOLTAGE REFERENCE
	Voltage reference	T_J = 25°C	0.792	0.8	0.808	V
	Voltage reference		0.78	0.8	0.821	V
HIGH-SIDE MOSFET
	On-resistance	V_(VIN) = 3.5 V, BOOT-PH = 3 V		300		mΩ
	On-resistance	V_(VIN) = 12 V, BOOT-PH = 6 V		200	465	mΩ
ERROR AMPLIFIER
	Input current			50		nA
	Error amplifier transconductance (g_M)	–2 μA < I_COMP < 2 μA, V_COMP = 1 V		97		μMhos
	Error amplifier transconductance (g_M) during slow start	–2 μA < I_COMP < 2 μA, V_COMP = 1 V, V_(VSENSE) = 0.4 V		26		μMhos
	Error amplifier dc gain	V_(VSENSE) = 0.8 V		10000		V/V
	Error amplifier bandwidth			2700		kHz
	Error amplifier source/sink	V_(COMP) = 1 V, 100 mV overdrive		±7		μA
	COMP to switch current transconductance			1.9		A/V
CURRENT LIMIT
	Current limit threshold	V_(VIN) = 12 V	0.5	0.94		A
THERMAL SHUTDOWN
	Thermal shutdown			182		°C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
	Switching frequency range using RT mode	V_(VIN) = 12 V	130		2500	kHz
ƒ_SW	Switching frequency	V_(VIN) = 12 V, R_T = 200 kΩ	440	581	740	kHz
	Switching frequency range using CLK mode	V_(VIN) = 12 V	300		2200	kHz
	Minimum CLK input pulse width			40		ns
	RT/CLK high threshold	V_(VIN) = 12 V		1.9	2.2	V
	RT/CLK low threshold	V_(VIN) = 12 V	0.5	0.7		V
	RT/CLK falling edge to PH rising edge delay	Measured at 500 kHz with RT resistor in series		60		ns
	PLL lock in time	Measured at 500 kHz		100		μs
SLOW START AND TRACKING (SS/TR)
	Charge current	V_(SS/TR) = 0.4 V		2		μA
	SS/TR-to-VSENSE matching	V_(SS/TR) = 0.4 V		45		mV
	SS/TR-to-reference crossover	98% nominal		1.0		V
	SS/TR discharge current (overload)	V_(VSENSE) = 0 V, V_(SS/TR) = 0.4 V		112		μA
	SS/TR discharge voltage	V_(VSENSE) = 0 V		54		mV
POWER GOOD (PWRGD PIN)
V_(VSENSE)	VSENSE threshold	VSENSE falling (fault)		92%
		VSENSE rising (good)		94%
		VSENSE rising (fault)		109%
		VSENSE falling (good)		107%
	Hysteresis	VSENSE falling		2%
	Output high leakage	V_(VSENSE) = V_REF, V_(PWRGD) = 5.5 V, 25°C		10		nA
	On resistance	I_(PWRGD) = 3 mA, V_(VSENSE) < 0.79 V		50		Ω
	Minimum VIN for defined output	V_(PWRGD) < 0.5 V, I_(PWRGD) = 100 μA		0.95	1.5	V