ZHCSH96H MARCH 2007 – May 2019 TPS40192 , TPS40193
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Selecting the Switching Frequency
- 8.2.2.2 Inductor Selection
- 8.2.2.3 Output Capacitor Selection (C8)
- 8.2.2.4 Peak Current Rating of the Inductor
- 8.2.2.5 Input Capacitor Selection (C7)
- 8.2.2.6 MOSFET Switch Selection (Q1, Q2)
- 8.2.2.7 Boot Strap Capacitor
- 8.2.2.8 Input Bypass Capacitor (C6)
- 8.2.2.9 BP5 Bypass Capacitor (C5)
- 8.2.2.10 Input Voltage Filter Resistor (R11)
- 8.2.2.11 Short Circuit Protection (R9)
- 8.2.2.12 Feedback Compensation (Modeling the Power Stage)
- 8.2.2.13 Feedback Divider (R7, R8)
- 8.2.2.14 Error Amplifier Compensation (R6, R10, C1, C2, C3)
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
8.2.2.9 BP5 Bypass Capacitor (C5)
The recommended minimum 1.0-μF ceramic capacitance stabilizes the 5-V regulator. To limit regulator noise to less than 10 mV, the bypass capacitor is sized by using Equation 23.
Equation 23. 
Because the Q2 gate charge is larger than Q1 and the total gate charge of Q2 is 44 nC, a BP5 capacitor of 4.4-μF is calculated, and the next larger standard value of 4.7 μF is selected to limit noise on the BP5 regulator.