The TPS36-Q1 offers high precision window watchdog timer monitoring. The device is available in multiple pinout options A to D which support multiple features to meet ever expanding needs of various applications. Ensure a correct pinout is selected to meet the application needs.

The window watchdog is active when the VDD voltage is higher than the V_IT- + V_HYS and the RESET is deasserted after the t_D time. The watchdog stays active as long as VDD > V_IT- and watchdog is enabled. TPS36-Q1 family offers various startup time delay options to ensure enough time is available for the host to complete boot operation. Please refer Section 8.3.2.4 section for additional details.

The window watchdog timer frame consists of two windows namely close window (t_WC) followed by open window (t_WO). The device monitors the WDI pin for falling edge. User is expected to provide a valid falling edge on WDI pin in the open window. Refer Section 5 to arrive at the relevant close window and open window values needed for application. The timer value is reset when a valid falling edge is detected on WDI pin in the t_WO time duration. An early fault is reported if a WDI falling edge is detected in close window. A late fault is reported if WDI falling edge is not detected in both close and open window. The device asserts RESET output for pinout options A, B and C or WDO output for pinout D for time t_D in event of watchdog fault. Refer Section 8.3.4 to arrive at the relevant t_D value needed for application.

Figure 8-6 shows the basic operation for window watchdog timer operation. The TPS36-Q1 watchdog functionality supports multiple features. Details are available in following sub sections.

Figure 8-6 Window Watchdog Timer Operation