ZHCSOF9B april 2022 – june 2023 TPS25981
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Undervoltage Lockout (UVLO and UVP)
- 8.3.2 Overvoltage Lockout (OVLO)
- 8.3.3 Inrush Current, Overcurrent, and Short-Circuit Protection
- 8.3.4 Analog Load Current Monitor
- 8.3.5 Overtemperature Protection (OTP)
- 8.3.6 Fault Response and Indication (FLT)
- 8.3.7 Power Good Indication (PG)
- 8.3.8 Quick Output Discharge (QOD)
- 8.3.9 Reverse Current Blocking FET Driver
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.9 Reverse Current Blocking FET Driver
The TPS259813x variants provide an option to drive an external N-FET for implementing reverse current blocking function. The N-FET is connected in series with the eFuse in a common source configuration as shown in Figure 8-8. The gate of the blocking FET is controlled by the DVDT pin of the eFuse. When the eFuse is turned ON and operating in steady-state, the DVDT pin is driven high which turns the external FET fully ON to provide a low impedance power path from input to output. When the eFuse turns OFF under any condition, the DVDT pin is pulled low and the blocking FET is turned OFF. This ensures there's no current path from the output to input in the OFF state.
Figure 8-8 Reverse Current Blocking Using External FET