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ZHCSHL4I October 2008 – December 2017 TPS23754 , TPS23754-1 , TPS23756

PRODUCTION DATA.

封裝選項(xiàng)

請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機(jī)械數(shù)據(jù) (封裝 | 引腳)

PWP|20

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

PWP|20
- PPTD027AA

訂購(gòu)信息

6.5 Electrical Characteristics

Unless otherwise noted: CS = COM = APD = CTL = RTN = ARTN, GATE and GAT2 float, R_FRS= 68.1 kΩ, R_BLNK= 249 kΩ, DT = V_B, PPD = V_SS, T2P open, C_VB = C_VC = 0.1 μF, R_DEN = 24.9 kΩ, R_CLS open, 0 V ≤ (V_DD, V_DD1) ≤ 57 V, 0 V ≤ V_C ≤ 18 V, –40°C ≤ T_J ≤ 125°C. Typical specifications are at 25°C.

CONTROLLER SECTION ONLY
[V_SS = RTN and V_DD = V_DD1] or [V_SS = RTN = V_DD], all voltages referred to [ARTN, COM]

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_C
V_CUV	UVLO	V_C rising ‘754	14.3	15	15.7	V
V_CUV		V_C rising ‘756	8.7	9	9.3
V_CUVH		Hysteresis ‘754 ⁽¹⁾	6.2	6.5	6.8
V_CUVH		Hysteresis ‘756 ⁽¹⁾	3.3	3.5	3.7
	Operating current	V_C = 12 V, CTL = V_B, R_DT = 68.1 kΩ	0.7	0.92	1.2	mA
t_ST	Bootstrap start-up time, C_VC = 22 μF	TPS23756, V_DD1 = 10.2 V, V_C(0) = 0 V	50	85	175	ms
		TPS23756, V_DD1 = 35 V, V_C(0) = 0 V	27	45	92
		TPS23754, V_DD1 = 19.2 V, V_C(0) = 0 V	49	81	166
		TPS23754, V_DD1 = 35 V, V_C(0) = 0 V	44	75	158
	Start-up current source is I_VC	TPS23754, V_DD1 = 19.2 V, V_C = 13.9 V	1.7	3.4	5.5	mA
		TPS23756, V_DD1 = 10.2 V, V_C = 8.6 V	0.44	1.06	1.8
		TPS23754, TPS23756, V_DD1 = 48 V, V_C = 0 V	2.7	4.8	6.8
V_B
	Voltage	6.5 V ≤ V_C ≤ 18 V, 0 ≤ I_VB ≤ 5 mA	4.8	5.1	5.25	V
FRS
	Switching frequency	CTL = V_B, measure GATE				kHz
	Switching frequency	R_FRS = 68.1 kΩ	227	253	278	kHz
D_MAX	Duty cycle	CTL= V_B, measure GATE	76%	78%	80%
V_SYNC	Synchronization	Input threshold	2	2.2	2.4	V
CTL
V_ZDC	0% duty cycle threshold	V_CTL ↓ until GATE stops	1.3	1.5	1.7	V
	Input resistance		70	100	145	kΩ
CS
V_CSMAX	Maximum threshold voltage	V_CTL = V_B, V_CS rising until GATE duty cycle drops	0.5	0.55	0.6	V
V_SLOPE	Internal slope compensation voltage	Peak voltage at maximum duty cycle, referenced to CS	120	155	185	mV
I_{SL_EX}	Peak slope compensation current	V_CTL = V_B, I_CS at maximum duty cycle	30	42	54	μA
	Bias current (sourcing)	DC component of I_CS	1	2.5	4.3	μA
GATE
	Source current	V_CTL = V_B, V_C = 12 V, GATE high, pulsed measurement	0.37	0.6	0.95	A
	Sink current	V_CTL = V_B, V_C = 12 V, GATE low, pulsed measurement	0.7	1	1.4	A
GAT2
	Source current	V_CTL = V_B, V_C = 12 V, GAT2 high, R_DT = 24.9 kΩ, pulsed measurement	0.37	0.6	0.95	A
	Sink current	V_CTL = V_B, V_C = 12 V, GAT2 low, R_DT = 24.9 kΩ, pulsed measurement	0.7	1	1.4	A
APD / PPD
V_APDEN	APD threshold voltage	V_APD rising	1.43	1.5	1.57	V
V_APDH	APD threshold voltage	Hysteresis ⁽¹⁾	0.29	0.31	0.33	V
V_PPDEN	PPD threshold voltage	V_PPD- V_VSS rising, UVLO disable	1.45	1.55	1.65	V
V_PPDH		Hysteresis ⁽¹⁾	0.29	0.31	0.33	V
V_PPD2		V_PPD- V_VSSrising, Class enable	7.4	8.3	9.2	V
V_PPD2H		Hysteresis ⁽¹⁾	0.5	0.6	0.7	V
	APD leakage current (source or sink)	V_C = 12 V, V_APD = V_B			1	μA
I_PPD	PPD sink current	V_PPD-VSS = 1.5 V	2.5	5	7.5	μA
THERMAL SHUTDOWN
	turnon temperature	T_J rising	135	145	155	°C
	Hysteresis⁽²⁾			20		°C

(1) The hysteresis tolerance tracks the rising threshold for a given device.

(2) These parameters are provided for reference only, and do not constitute part of TI's published specifications for purposes of TI's product warranty.