ZHCSIX4I August 2007 – June 2024 TMP102
PRODUCTION DATA
To communicate with the TMP102, the controller must first address target devices via a target address byte. The target address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation.
The TMP102 features an address pin to allow up to four devices to be addressed on a single bus. Table 6-4 describes the pin logic levels used to properly connect up to four devices.
| DEVICE TWO-WIRE ADDRESS | A0 PIN CONNECTION |
|---|---|
| 1001000 | Ground |
| 1001001 | V+ |
| 1001010 | SDA |
| 1001011 | SCL |