10.1 Layout Guidelines

10.2 Layout Example

1. Not required.

Figure 28. SOT-23 Layout Example

10.3 Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the table. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.

Power dissipation depends on input voltage and load conditions. Power dissipation (P_D) can be approximated by the product of the output current times the voltage drop across the output pass element (V_IN to V_OUT), as shown in Equation 3.

Estimating the junction temperature can be done by using the thermal metrics Ψ_JT and Ψ_JB, as discussed in the table. These metrics are a more accurate representation of the heat transfer characteristics of the die and the package than R_θJA. The junction temperature can be estimated with Equation 4.

Equation 4.

where

• P_D is the power dissipation shown by Equation 3,
• T_T is the temperature at the center-top of the device package,
• T_B is the PCB temperature measured 1 mm away from the device package on the PCB surface.

For more information about measuring T_T and T_B, see application note Using New Thermal Metrics (SBVA025), available for download at www.ti.com.