10.1 Layout Guidelines
The printed-circuit-board (PCB) layout is an important step to maintain the high performance of the TLV62585 device.
- The input/output capacitors and the inductor should be placed as close as possible to the IC. This keeps the power traces short. Routing these power traces direct and wide results in low trace resistance and low parasitic inductance.
- The low side of the input and output capacitors must be connected properly to the GND pin to avoid a ground potential shift.
- The sense traces connected to FB is a signal trace. Special care should be taken to avoid noise being induced. Keep these traces away from SW nodes.
- A common ground should be used. GND layers might be used for shielding.
See Figure 23 and Figure 24 for the recommended PCB layout.