| SUPPLY |
| IQ |
Quiescent current into VIN |
No load, device not switching |
|
35 |
|
µA |
| ISD |
Shutdown current into VIN |
EN = Low |
|
0.7 |
2 |
µA |
| VUVLO |
Under voltage lock out threshold |
VIN falling |
|
2.3 |
2.45 |
V |
| Under voltage lock out hysteresis |
|
|
150 |
|
mV |
| TJSD |
Thermal shutdown threshold |
TJ rising |
|
150 |
|
°C |
| Thermal shutdown hysteresis |
|
|
20 |
|
°C |
| LOGIC INTERFACE EN |
| VIH |
High-level input voltage |
VIN = 2.5 V to 5.5 V |
1.2 |
|
|
V |
| VIL |
Low-level input voltage |
VIN = 2.5 V to 5.5 V |
|
|
0.4 |
V |
| SOFT START, POWER GOOD |
| tSS |
Soft start time |
Time from EN high to 95% of VOUT nominal |
|
900 |
|
µs |
| VPG |
Power good threshold |
VOUT rising, referenced to VOUT nominal |
|
95% |
|
|
| VOUT falling, referenced to VOUT nominal |
|
90% |
|
|
| VPG,OL |
Low-level output voltage |
Isink = 1 mA |
|
|
0.4 |
V |
| IPG,LKG |
Input leakage current into PG pin |
VPG = 5.0 V |
|
0.01 |
|
µA |
| tPG,DLY |
Power good delay |
VFB falling |
|
40 |
|
µs |
| OUTPUT |
| VFB |
Feedback regulation voltage |
PWM mode, 2.5 V ≤ VIN ≤ 5.5 V, 0°C to 85°C |
594 |
600 |
606 |
mV |
| PWM mode, 2.5 V ≤ VIN ≤ 5.5 V, -40°C to 125°C |
588 |
600 |
612 |
| IFB,LKG |
Feedback input leakage current |
VFB = 0.6 V |
|
0.01 |
|
µA |
| RDIS |
Output discharge FET on-resistance |
EN = Low, VOUT = 1.8 V |
|
10 |
|
Ω |
| POWER SWITCH |
| RDS(on) |
High-side FET on-resistance |
|
|
56 |
|
mΩ |
| Low-side FET on-resistance |
|
|
32 |
|
mΩ |
| ILIM |
High-side FET switch current limit |
|
4 |
4.6 |
|
A |
| fSW |
PWM switching frequency |
VOUT = 1.8V, IOUT = 1 A |
|
1.5 |
|
MHz |