ZHCSP57A october 2006 – may 2023 TLV3011-EP , TLV3012-EP
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings - TLV3011-EP
- 6.2 Absolute Maximum Ratings - TLV3012-EP
- 6.3 ESD Ratings
- 6.4 Thermal Resistance Characteristics
- 6.5 Recommended Operating Conditions - TLV3011-EP
- 6.6 Recommended Operating Conditions - TLV3012-EP
- 6.7 Electrical Characteristics - TLV3011-EP
- 6.8 Electrical Characteristics - TLV3012-EP
- 6.9 Switching Characteristics - TLV3012-EP
- 6.10 Typical Characteristics - TLV3011-EP
- 6.11 Typical Characteristics - TLV3012-EP
- 7 Detailed Description
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- DBV|6
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7.4.5 Power-On Reset (POR) (TLV3012-EP Only)
This section does NOT apply to the open-drain output TLV3011-EP.
The TLV3012-EP has an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry will be activated for up to 1.9ms after the minimum supply voltage threshold is crossed, or immediately when the supply voltage drops below minimum supply. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (VID). This delay is long enough to allow the reference output to stabilize with up to a 10nF capacitive load.
During the POR period (ton), the outputs will be low (sinking)
Figure 7-1 Power-On Reset Example Timing Diagram for TLV3012-EP