SLVSA51E March 2010 – September 2016 TLC5940-EP
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
11 Layout
11.1 Layout Guidelines
- Place the decoupling capacitor near the VCC pin and GND plane.
- Place the current programming resistor Riref close to IREF pin and IREFGND pin.
- Route the GND pattern as widely as possible for large GND currents.
- Routing wire between the LED cathode side and the device OUTn pin should be as short and straight as possible to reduce wire inductance.
- When several ICs are chained, symmetric placements are recommended.
11.2 Layout Example
Figure 25. Layout Recommendation
11.3 Power Dissipation Calculation
The device power dissipation must be below the power dissipation rating of the device package to ensure correct operation. Equation 11 calculates the power dissipation of device:
Equation 11. 
where
- VCC: device supply voltage
- ICC: device supply current
- VOUT: TLC5940-EP OUTn voltage when driving LED current
- IMAX: LED current adjusted by R(IREF) Resistor
- DCn: maximum dot correction value for OUTn
- N: number of OUTn driving LED at the same time
- dPWM: duty cycle defined by BLANK pin or GS PWM value