ZHCSEZ2D January 2014 – October 2021 TCA9539-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
9.1 Power-On Reset Requirements
In the event of a glitch or data corruption, TCA9539-Q1 can be reset to its default conditions by using the power-on reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This reset also happens when the device is powered on for the first time in an application.
The voltage waveform for a power-on reset is shown in Figure 9-1.
Figure 9-1 VCC is Lowered Below the POR Threshold, then Ramped Back Up to VCCTable 9-1 specifies the performance of the power-on reset feature for TCA9539-Q1.
| PARAMETER | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|
| VCC_FT | Fall rate | See Figure 9-1 | 0.1 | ms | ||
| VCC_RT | Rise rate | See Figure 9-1 | 0.1 | ms | ||
| VCC_TRR | Time to re-ramp (when VCC drops to VPOR_MIN – 50 mV or when VCC drops to GND) | See Figure 9-1 | 2 | μs | ||
| VCC_GH | The level (referenced to VCC) that VCC can glitch down to, but not cause a functional disruption when VCC_GW | See Figure 9-2 | 1.2 | V | ||
| VCC_MV | The minimum voltage that VCC can glitch down to without causing a reset (VCC_GH must not be violated) | See Figure 9-2 | 1.5 | V | ||
| VCC_GW | Glitch width that does not cause a functional disruption | See Figure 9-2 | 10 | μs | ||
| VPORF | Voltage trip point of POR on falling VCC | 0.75 | 1 | V | ||
| VPORR | Voltage trip point of POR on rising VCC | 1.2 | 1.5 | V | ||
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width (VCC_GW) and height (VCC_GH) are dependent on each other. The bypass capacitance, source impedance, and device impedance are factors that affect power-on reset performance. Figure 9-2 and Table 9-1 provide more information on how to measure these specifications.
Figure 9-2 Glitch Width, Glitch Height, and Minimum Glitch VoltageVPOR is critical to the power-on reset. VPORR is the voltage level at which the reset condition is released and all the registers and the I2C/SMBus state machine are initialized to their default states. The value of VPOR differs based on the VCC being lowered to or from 0. Figure 9-3 and Table 9-1 provide more details on this specification.
Figure 9-3 VPOR