ZHCSKF7A May 2019 – January 2023 TAS5825P
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Digital I/O | ||||||
| |IIH| | Input logic high current level for DVDD referenced digital input pins | VIN(DigIn) = VDVDD | 10 | μA | ||
| |IIL| | Input logic low current level for DVDD referenced digital input pins | VIN(DigIn) = 0 V | –10 | μA | ||
| VIH(Digin) | Input logic high threshold for DVDD referenced digital inputs | 70% | VDVDD | |||
| VIL(Digin) | Input logic low threshold for DVDD referenced digital inputs | 30% | VDVDD | |||
| VOH(Digin) | Output logic high voltage level | IOH = 4 mA | 80% | VDVDD | ||
| VOL(Digin) | Output logic low voltage level | IOH = –4 mA | 20% | VDVDD | ||
| I2C Control Port | ||||||
| CL(I2C) | Allowable load capacitance for each I2C Line | 400 | pF | |||
| fSCL(fast) | Support SCL frequency | No wait states, fast mode | 400 | kHz | ||
| fSCL(slow) | Support SCL frequency | No wait states, slow mode | 100 | kHz | ||
| Serial Audio Port | ||||||
| tDLY | Required LRCK/FS to SCLK rising edge delay | 5 | ns | |||
| DSCLK | Allowable SCLK duty cycle | 40% | 60% | |||
| fS | Supported input sample rates | 32 | 192 | kHz | ||
| fSCLK | Supported SCLK frequencies | 32 | 64 | fS | ||
| fSCLK | SCLK frequency | 24.576 | MHz | |||
| Speaker Amplifier (All Output Configurations) | ||||||
| toff | Turn-off Time | Excluding volume ramp | 10 | ms | ||
| ICC | Quiescent supply current of DVDD | PDN = 2 V, DVDD = 3.3 V, Play mode, General Audio Process flow with full DSP running | 25.5 | mA | ||
| ICC | Quiescent supply current of DVDD | PDN = 2 V, DVDD = 3.3 V, Sleep mode | 0.87 | mA | ||
| ICC | Quiescent supply current of DVDD | PDN = 2 V, DVDD = 3.3 V, Deep Sleep mode | 0.82 | mA | ||
| ICC | Quiescent supply current of DVDD | PDN = 0.8 V, DVDD = 3.3 V, Shutdown mode | 7.4 | μA | ||
| ICC | Quiescent supply current of PVDD | PDN = 2 V, PVDD = 13.5 V, No Load, LC filter = 10 μH + 0.68 μF, FSW = 384 kHz, Hybrid Modulation, Play Mode | 29.5 | mA | ||
| ICC | Quiescent supply current of PVDD | PDN = 2 V, PVDD = 13.5 V, No Load, LC filter = 22 μH + 0.68 μF, FSW = 384 kHz, Hybrid Modulation, Play Mode | 20.5 | mA | ||
| ICC | Quiescent supply current of PVDD | PDN = 2 V, PVDD = 13.5 V, No Load, LC filter = 10 μH + 0.68 μF, FSW = 384 kHz, Output Hiz Mode | 10.7 | mA | ||
| ICC | Quiescent supply current of PVDD | PDN = 2 V, PVDD = 13.5 V, No Load, LC filter = 10 μH + 0.68 μF, Fsw = 384 kHz, Sleep Mode | 7.26 | mA | ||
| ICC | Quiescent supply current of PVDD | PDN = 2 V, PVDD = 13.5 V, No Load, LC filter = 10 μH + 0.68 μF, Fsw = 384 kHz, Deep Sleep Mode | 12.01 | μA | ||
| ICC | Quiescent supply current of PVDD | PDN = 0.8 V, PVDD = 13.5 V, No Load, LC filter = 10 μH + 0.68 μF, FSW = 384 kHz, Shutdown Mode | 7.8 | μA | ||
| AV(SPK_AMP) | Programmable Gain | Value represents the "peak voltage" disregarding clipping due to lower PVDD). Measured at 0 dB input (1FS) | 4.87 | 29.5 | V | |
| ΔAV(SPK_AMP) | Amplifier gain error | Gain = 29.5 VP | 0.5 | dB | ||
| fSPK_AMP | Switching frequency of the speaker amplifier | 384 | kHz | |||
| 768 | kHz | |||||
| RDS(on) | Drain-to-source on resistance of the individual output MOSFETs | FET + Metallization. | 90 | mΩ | ||
| OCETHRES | Over-Current Error Threshold | Any short to supply, ground, or other channels | 7.5 | A | ||
| Over-Current cycle-by-cycle limit | 6.5 | A | ||||
| OVETHRES(PVDD | PVDD over voltage error threshold | 28 | V | |||
| UVETHRES(PVDD | PVDD under voltage error threshold | 4.2 | V | |||
| OTETHRES | Over temperature error threshold | 160 | °C | |||
| OTEHystersis | Over temperature error hysteresis | 10 | °C | |||
| OTWTHRES | Over temperature warning level 1 | Read by register 0x73 bit0 | 112 | °C | ||
| OTWTHRES | Over temperature warning level 2 | Read by register 0x73 bit1 | 122 | °C | ||
| OTWTHRES | Over temperature warning level 3 | Read by register 0x73 bit2 | 134 | °C | ||
| OTWTHRES | Over temperature warning level 4 | Read by register 0x73 bit3 | 146 | °C | ||
| Speaker Amplifier (Stereo BTL) | ||||||
| |VOS| | Amplifier offset voltage | Measured differentially with zero input data, programmable gain configured with 29.5 VP gain, VPVDD = 16 V | –7.5 | 7.5 | mV | |
| PO(SPK) | Output Power (Per Channel) | VPVDD = 14.4 V, SPK_GAIN = 29.5 VP, RSPK = 6 Ω, f = 1 kHz THD+N = 10% | 17.8 | W | ||
| VPVDD = 14.4 V, SPK_GAIN = 29.5 VP, RSPK = 6 Ω, f = 1 kHz THD+N = 1% | 14.5 | W | ||||
| VPVDD = 24 V, SPK_GAIN = 29.5 VP, RSPK = 8 Ω, f = 1 kHz THD+N = 10% (Instantaneous Output Power) | 38 | W | ||||
| VPVDD = 24 V, SPK_GAIN = 29.5 VP, RSPK = 8 Ω, f = 1 kHz THD+N = 1% (Continuous Output Power) | 30 | W | ||||
| THD+NSPK | Total harmonic
distortion and noise (PO = 1 W, f = 1 kHz, RSPK = 6 Ω) | VPVDD = 12 V, SPK_GAIN = 20.9 VP LC-filter | 0.03% | |||
| VPVDD = 24 V, SPK_GAIN = 29.5 VP, LC-filter | 0.03% | |||||
| ICN(SPK) | Idle channel noise (A-weighted, AES17) | VPVDD = 12 V, LC-filter, Load = 6 Ω, Hybrid Modulation | 32 | μVrms | ||
| ICN(SPK) | VPVDD = 12 V, LC-filter, Load = 6 Ω, BD Modulation | 40 | ||||
| ICN(SPK) | VPVDD = 24 V, LC-filter ,Load = 6 Ω, Hybrid Modulation | 35 | ||||
| ICN(SPK) | VPVDD = 24 V, LC-filter ,Load = 6 Ω, BD Modulation | 45 | ||||
| DR | Dynamic range | A-Weighted, -60 dBFS method. PVDD = 24 V, SPK_GAIN = 29.5 Vp | 111 | dB | ||
| SNR | Signal-to-noise ratio | A-Weighted, referenced to 1% THD+N Output Level, PVDD = 24 V | 111 | dB | ||
| A-Weighted, referenced to 1% THD+N Output Level, PVDD = 14.4 V | 108 | dB | ||||
| KSVR | Power supply rejection ratio | Injected Noise = 1 kHz, 1 Vrms, PVDD = 14.4 V, input audio signal = digital zero | 72 | dB | ||
| CrosstalkSPK | Crosstalk (worst case between left-to-right and right-to-left coupling) | f = 1 kHz | -100 | dB | ||
| Speaker Amplifier (Mono PBTL) | ||||||
| PO(SPK) | Output Power | VPVDD = 19 V, SPK_GAIN = 29.5 VP, RSPK = 3 Ω, f = 1 kHz, THD+N = 1% | 50 | W | ||
| VPVDD = 19 V, SPK_GAIN = 29.5 VP, RSPK = 3 Ω, f = 1 kHz, THD+N = 10% | 60 | W | ||||
| VPVDD = 22 V, SPK_GAIN = 29.5 VP, RSPK = 4 Ω, f = 1 kHz, THD+N = 1% | 53 | W | ||||
| VPVDD = 22 V, SPK_GAIN = 29.5 VP, RSPK = 4 Ω, f = 1 kHz, THD+N = 10% | 65 | W | ||||
| THD+NSPK | Total harmonic distortion and
noise (PO = 1 W, f = 1 kHz | VPVDD = 19 V, SPK_GAIN = 20.9 Vp, LC-filter RSPK = 3 Ω) | 0.03% | |||
| VPVDD = 24 V, SPK_GAIN = 29.5 VP, LC-filter RSPK = 4 Ω) | 0.03% | |||||
| DR | Dynamic range | A-Weighted, -60 dBFS method, PVDD=19V | 109 | dB | ||
| SNR | Signal-to-noise ratio | A-Weighted, referenced to 1% THD+N Output Level, PVDD = 19 V | 109 | dB | ||
| A-Weighted, referenced to 1% THD+N Output Level, PVDD = 24 V | 111 | dB | ||||