ZHCSBC4D May 2013 – May 2017 TAS5760MD
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Digital I/O Pins
- 7.6 Master Clock
- 7.7 Serial Audio Port
- 7.8 Protection Circuitry
- 7.9 Speaker Amplifier in All Modes
- 7.10 Headphone Amplifier and Line Driver
- 7.11 I²C Control Port
- 7.12 Typical Idle, Mute, Shutdown, Operational Power Consumption
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4
Device Functional Modes
- 8.4.1
Hardware Control Mode
- 8.4.1.1 Speaker Amplifier Shut Down (SPK_SD Pin)
- 8.4.1.2 Serial Audio Port in Hardware Control Mode
- 8.4.1.3 Soft Clipper Control (SFT_CLIP Pin)
- 8.4.1.4 Speaker Amplifier Switching Frequency Select (FREQ/SDA Pin)
- 8.4.1.5 Parallel Bridge Tied Load Mode Select (PBTL/SCL Pin)
- 8.4.1.6 Speaker Amplifier Sleep Enable (SPK_SLEEP/ADR Pin)
- 8.4.1.7 Speaker Amplifier Gain Select (SPK_GAIN [1:0] Pins)
- 8.4.1.8 Considerations for Setting the Speaker Amplifier Gain Structure
- 8.4.2 Software Control Mode
- 8.4.1
Hardware Control Mode
- 8.5
Register Maps
- 8.5.1 Control Port Registers - Quick Reference
- 8.5.2
Control Port Registers - Detailed Description
- 8.5.2.1 Device Identification Register (0x00)
- 8.5.2.2 Power Control Register (0x01)
- 8.5.2.3 Digital Control Register (0x02)
- 8.5.2.4 Volume Control Configuration Register (0x03)
- 8.5.2.5 Left Channel Volume Control Register (0x04)
- 8.5.2.6 Right Channel Volume Control Register (0x05)
- 8.5.2.7 Analog Control Register (0x06)
- 8.5.2.8 Reserved Register (0x07)
- 8.5.2.9 Fault Configuration and Error Status Register (0x08)
- 8.5.2.10 Reserved Controls (9 / 0x09) - (15 / 0x0F)
- 8.5.2.11 Digital Clipper Control 2 Register (0x10)
- 8.5.2.12 Digital Clipper Control 1 Register (0x11)
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Applications
- 9.2.1
Stereo BTL Using Software Control
- 9.2.1.1 Design Requirements
- 9.2.1.2
Detailed Design Procedure
- 9.2.1.2.1 Startup Procedures- Software Control Mode
- 9.2.1.2.2 Shutdown Procedures- Software Control Mode
- 9.2.1.2.3 Component Selection and Hardware Connections
- 9.2.1.2.4 Recommended Startup and Shutdown Procedures
- 9.2.1.2.5
Headphone and Line Driver Amplifier
- 9.2.1.2.5.1 Charge-Pump Flying Capacitor and DR_VSS Capacitor
- 9.2.1.2.5.2 Decoupling Capacitors
- 9.2.1.2.5.3 Gain-Setting Resistor Ranges
- 9.2.1.2.5.4 Using the Line Driver Amplifier in the TAS5760MD as a Second-Order Filter
- 9.2.1.2.5.5 External Undervoltage Detection
- 9.2.1.2.5.6 Input-Blocking Capacitors
- 9.2.1.2.6 Gain-Setting Resistors
- 9.2.1.3 Application Curve
- 9.2.2 Stereo BTL Using Hardware Control
- 9.2.3 Mono PBTL Using Software Control
- 9.2.4 Mono PBTL Using Hardware Control
- 9.2.1
Stereo BTL Using Software Control
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
1 特性
2 應用
- LCD/LED TV 和多用途監視器
- 條形音箱，擴展塢，PC 音頻
- 通用音頻設備
3 說明
TAS5760MD是一款立體聲 I2S 輸入器件，具有硬件和軟件 (I²C) 控制模式、集成數字削波器、多種增益選項并且電源運行電壓范圍較大，支持其適用于多種 應用非常有用。TAS5760MD運行電壓范圍為 4.5V 至24VDC 的標稱電源電壓。該器件配有集成 DirectPath™ 耳機放大器和線路驅動器，可提高系統級集成度并降低解決方案總成本。
輸出金屬氧化物半導體場效應晶體管 (MOSFET) 的 120mΩ DS(ON) 兼顧散熱性能與器件成本，二者相得益彰。此外，該器件采用耐熱增強型 48-Pin TSSOP封裝，在現代消費類電子器件的較高工作環境溫度下展現出優異的性能。
整個 TAS5760xx 系列均采用 48-Pin TSSOP封裝，并且所有系列成員器件之間彼此引腳到引腳兼容。另外，對于可能不需要耳機/線路驅動器且 不要求引腳至引腳兼容， 但希望解決方案實現最小化的應用，TAS5760M 和 TAS5760L 器件可采用 32 引腳薄型小外形尺寸 (TSSOP) 封裝。TAS5760xx 系列所有器件的 I2C 寄存器映射是相同的，這樣一來，當需要根據系統級要求更換器件時，可以減少二次開發的工作量。
器件信息(1)
| 器件型號 | 封裝 | 封裝尺寸（標稱值） |
|---|---|---|
| TAS5760MD | HTSSOP (48) | 12.50mm x 6.10mm |
- 要了解所有可用封裝，請見數據表末尾的可訂購產品附錄。
功能方框圖
