ZHCSFP7B November 2016 – February 2019 TAS2557
PRODUCTION DATA.
In left-justified mode, the MSB of the right channel is valid on the rising edge of the bit clock following the falling edge of the word clock. Similarly the MSB of the left channel is valid on the rising edge of the bit clock following the rising edge of the word clock.
Figure 36. Timing Diagram for Left-Justified Mode
Figure 37. Timing Diagram for Light-Left Mode with ASI_OFFSET1 = 1
Figure 38. Timing Diagram for Left-Justified Mode with ASI_OFFSET1 = 0 and Inverted Bit Clock For left-justified mode, the number of bit-clocks per frame should be greater than twice the programmed word-length of the data. Also, the programmed offset value should be less than the number of bit-clocks per frame by at least the programmed word-length of the data.