ZHCSFP7B November 2016 – February 2019 TAS2557
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
The TAS2557 device is a state-of-the-art Class-D audio amplifier which is a full system on a chip (SoC). The device features a ultra low-noise audio DAC and Class-D power amplifier which incorporates speaker voltage and current sensing feedback. An on-chip, low-latency DSP supports Texas Instruments' Smart Amp speaker protection algorithms to maximize loudness while maintaining safe speaker conditions. A smart integrated multi-level Class-H boost converter maximizes system efficiency at all times by tracking the required output voltage. The TAS2557 drives up to 3.8 W from a 4.2-V supply into an 8-Ω speaker with 1% THD, or up to up 5.7 W into a 4-Ω speaker with 1% THD.
The TAS2557 , with final processed digital output, can also be used to increase loudness and clarity in both Noise Canceling / Echo Cancelling speaker phone applications as well as for music or other sound applications. The TAS2557 accepts input audio data rates from 8 kHz to 96 kHz using ROM modes to fully support both speakerphone and music applications. When speaker protection system is running the maximum sampling rate is limited to 48 kHz.
The multi-level Class-H boost converter generates the Class-D amplifier supply rail. When the audio signal requires a output power below VBAT, the boost improves system efficiency by deactivating and connecting VBAT directly to the Class-D amplifier supply. When higher audio output power is required, the boost quickly activates and provides a much louder and clearer signal than can be achieved in any standard amplifier speaker system design approach. A boost inductor of 1uH can be used with a slight increase in boost ripple.
On-chip brownout detection system shutdown down audio at the user configurable threshold to avoid undesired system reset. In addition, an AGC can be selected to minimize clipping events when a lower power supply voltage is provided to the Class-D speaker driver. When this supply voltage drops below the proper level then under-voltage protection will be tripped. All protection statuses are available via register reads.
The Class-D output switching frequency is synchronous with the digital input audio sample rate to avoid left and right PWM frequency differences from beating in stereo applications. PWM Edge rate control and Spread Spectrum features are available if further EMI reduction is desired in the user’s system.
The interrupt request pin (IRQ) indicates a device error condition. The interrupt flag condition or conditions are selectable via I2C and include: thermal overload, Class-D over-current, VBAT level low, VBOOST level low, and PLL out-of-lock conditions. The IRQ signal is active-high for an interrupt request and low during normal operation. This behavior can be changed by a register setting to tri-state the pin during normal operation to allow the IRQ pin to be tied in parallel with other active-low interrupt request pins on other devices in the system.
Stereo configuration can be achieved with two TAS2557 devices by using the ADR0_SCLK and ADR1_MISO pins to set different I2C addresses in I2C mode or the SCL_SSZ chip enable pin in SPI mode. Refer to the General I2C Operation or General SPI Operation sections for more details.