ZHCSRE3N November 1996 – December 2022 SN74LVCC4245A
PRODUCTION DATA
請參考 PDF 數據表獲取器件具體的封裝圖。
TI level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies caused by improperly biased device pins. Take these precautions to guard against such power-up problems:
For more information, refer to the Voltage-Level-Translation Devices application note.