ZHCSJA5P April 1999 – January 2019 SN74LVC2G241
PRODUCTION DATA.
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The SN74LVC2G241 device is designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74LVC2G241 device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is low and 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high and 2OE is low, the outputs are in the high-impedance state.
The SN74LVC2G241 is also an effective redriver, with a maximum output current drive of 32 mA.