SCES581D JULY 2004 – October 2015 SN74LVC1GX04
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics, SN74LVC1GX04
- 6.7 Switching Characteristics, SN74LVC1GX04
- 6.8 Switching Characteristics, SN74LVC1GX04
- 6.9 Operating Characteristics
- 6.10 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- DBV|6
- DRL|6
- DCK|6
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
8 Detailed Description
8.1 Overview
The SN74LVC1GX04 is optimized for creating a crystal oscillator circuit with a buffered square-wave output. This device is fully specified for partial-power-down applications using Ioff (Y output only). The Ioff circuitry disables the outputs, preventing damaging current back-flow through the device when it is powered down.
8.2 Functional Block Diagram
Figure 4. Logic Diagram (Positive Logic)
8.3 Feature Description
The first inverter is used as a linear amplifier for crystal oscillator.
The last three inverters ensure a fast edge square-wave at the Y output.
8.4 Device Functional Modes
The only intended device use is to generate a square-wave output using a crystal to set the operating frequency.
Table 1. Function Table
| INPUT X1 | OUTPUTS | |
|---|---|---|
| X2 | Y | |
| H | L | H |
| L | H | L |