SCES538G January 2004 – February 2020 SN74LVC1G38
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics, CL = 15 pF
- 6.7 Switching Characteristics, CL = 30 pF or 50 pF, –40°C to +85°C
- 6.8 Switching Characteristics, CL = 30 pF or 50 pF, –40°C to +125°C
- 6.9 Operating Characteristics
- 6.10 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- DPW|5
- DBV|5
- DSF|6
- DCK|5
- DRY|6
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
3 Description
The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCC operation.
This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y = A × B or Y = A + B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
Device Information(1)
| DEVICE NAME | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN74LVC1G38DBV | SOT-23 (5) | 2.90 mm × 1.60 mm |
| SN74LVC1G38DCK | SC70 (5) | 2.00 mm × 1.25 mm |
| SN74LVC1G38DRY | SON (6) | 1.45 mm × 1.00 mm |
| SN74LVC1G38DSF | SON (6) | 1.00 mm × 1.00 mm |
| SN74LVC1G38YZP | DSBGA (5) | 0.89 mm × 1.39 mm |
| SN74LVC1G38DPW | X2SON (5) | 0.80 mm × 0.80 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Logic Diagram (Positive Logic)
