ZHCSUN0E February 2004 – December 2024 SN74LVC125A-Q1
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 3-1 D Package, 14-Pin SOIC; PW
Package, TSSOP-14 PIN (Top View)
Figure 3-2 BQA Package, 14-Pin WQFN
(Top View)| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| 1OE | 1 | Input | Output Enable |
| 1A | 2 | Input | Input A |
| 1Y | 3 | Output | Output Y |
| 2OE | 4 | Input | Output Enable |
| 2A | 5 | Input | Input A |
| 2Y | 6 | Output | Output Y |
| GND | 7 | — | Ground |
| 3Y | 8 | Output | Output Y |
| 3A | 9 | Input | Input A |
| 3OE | 10 | Input | Output Enable |
| 4Y | 11 | Output | Output Y |
| 4A | 12 | Input | Input A |
| 4OE | 13 | Input | Output Enable |
| VCC | 14 | — | Positive Supply |