ZHCSLQ9E February 2004 – August 2020 SN74AVC24T245
PRODUCTION DATA
This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the intended flow of data and take care not to violate any of the high or low logic levels. Unused data inputs must not be floating, as this can cause excessive internal leakage on the input CMOS structure. Tie any unused input and output ports directly to ground.
For this design example, use the parameters listed in the Electrical Characteristics.
| DESIGN PARAMETER | EXAMPLE VALUE |
|---|---|
| Input voltage range | 1.2 V to 3.6 V |
| Output voltage range | 1.2 V to 3.6 V |