ZHCSCM6G May 2014 – October 2019 SN65HVD70 , SN65HVD71 , SN65HVD73 , SN65HVD74 , SN65HVD76 , SN65HVD77
PRODUCTION DATA.
For the SN65HVD70, SN65HVD73, and SN65HVD76, when the driver enable pin, DE, is logic high, the differential outputs Y and Z follow the logic states at data input D. A logic high at D causes Y to turn high and Z to turn low. In this case the differential output voltage defined as VOD = V(Y) – V(Z) is positive. When D is low, the output states reverse, Z turns high, Y becomes low, and VOD is negative.
When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pulldown resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pullup resistor to VCC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.
| INPUT | ENABLE | OUTPUTS | FUNCTION | |
|---|---|---|---|---|
| D | DE | Y | Z | |
| H | H | H | L | Actively drives the bus high |
| L | H | L | H | Actively drives the bus low |
| X | L | Z | Z | Driver disabled |
| X | OPEN | Z | Z | Driver disabled by default |
| OPEN | H | H | L | Actively drives the bus high by default |
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = V(A) – V(B) is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and less than the negative and lower than the negative input threshold, VIT–, the receiver output, R, turns low. If VID is between VIT+ and VIT– the output is indeterminate.
When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).
| DIFFERENTIAL INPUT | ENABLE | OUTPUT | FUNCTION |
|---|---|---|---|
| VID = V(A) – V(B) | RE | R | |
| VIT+ < VID | L | H | Receives valid bus High |
| VIT– < VID < VIT+ | L | ? | Indeterminate bus state |
| VID < VIT– | L | L | Receives valid bus Low |
| X | H | Z | Receiver disabled |
| X | OPEN | Z | Receiver disabled by default |
| Open-circuit bus | L | H | Fail-safe high output |
| Short-circuit bus | L | H | Fail-safe high output |
| Idle (terminated) bus | L | H | Fail-safe high output |
For the SN65HVD71, HVD74, and HVD77, the driver and receiver are fully enabled, thus the differential outputs Y and Z follow the logic states at data input D at all times. A logic high at D causes Y to turn high and Z to turn low. In this case the differential output voltage defined as VOD = V(Y) – V(Z) is positive. When D is low, the output states reverse, Z turns high, Y becomes low, and VOD is negative. The D pin has an internal pullup resistor to VCC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.
| INPUT | OUTPUTS | FUNCTION | |
|---|---|---|---|
| D | Y | Z | |
| H | H | L | Actively drives the bus High |
| L | L | H | Actively drives the bus Low |
| OPEN | H | L | Actively drives the bus High by default |
When the differential input voltage defined as VID = V(A) – V(B) is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and less than the negative input threshold, VIT–, the receiver output, R, turns low. If VID is between VIT+ and VIT– the output is indeterminate. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).
| DIFFERENTIAL INPUT | OUTPUT | FUNCTION |
|---|---|---|
| VID = V(A) – V(B) | R | |
| VIT+ < VID | H | Receives valid bus High |
| VIT– < VID < VIT+ | ? | Indeterminate bus state |
| VID < VIT– | L | Receives valid bus Low |
| Open-circuit bus | H | Fail-safe high output |
| Short-circuit bus | H | Fail-safe high output |
| Idle (terminated) bus | H | Fail-safe high output |