ZHCSE15F July 2015 – May 2018 SN65DP159 , SN75DP159
PRODUCTION DATA.
There are two methods for debugging a system making sure the inputs to the SNx5DP159 are valid. A TMDS error checker is implemented that will increment an error counter per data lane. This allows the system implementer to determine how the link between the source and SNx5DP159 is performing on all three data lanes. See CSR Bit Field Definitions – RX PATTERN VERIFIER CONTROL/STATUS register in Table 10.
If a high error count is evident, the SNx5DP159 has the ability to provide the general eye quality. A tool is available that uses the I2C[4] link to download data that can be plotted for an eye diagram. This is available per data lane.