ZHCSJ41 December 2018 SN55HVD233-SEP
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| VIT+ | Positive-going input threshold voltage | V(LBK) = 0 V, see Table 1 | 750 | 900 | mV | |||
| VIT– | Negative-going input threshold voltage | 500 | 650 | mV | ||||
| Vhys | Hysteresis voltage (VIT+ – VIT–) | 100 | mV | |||||
| VOH | High-level output voltage | IO = –4 mA, see Figure 17 | 2.4 | V | ||||
| VOL | Low-level output voltage | IO = 4 mA, see Figure 17 | 0.4 | V | ||||
| II | Bus input current | V(CANH) or V(CANL) = 12 V | Other bus pin = 0 V,
V(D) = 3 V, V(LBK) = 0 V, V(RS) = 0 V |
150 | 500 | µA | ||
| V(CANH) or V(CANL) = 12 V,
VCC = 0 V |
150 | 600 | ||||||
| CANH or CANL = –7 V | –610 | –100 | ||||||
| CANH or CANL = –7 V,
VCC = 0 V |
–450 | –100 | ||||||
| CI | Input capacitance (CANH or CANL) | Pin-to-ground, VI = 0.4 sin(4E6πt) + 0.5 V,
V(D) = 3 V, V(LBK) = 0 V |
40 | pF | ||||
| CID | Differential input capacitance | Pin-to-pin, VI = 0.4 sin(4E6πt) + 0.5 V,
V(D) = 3 V, V(LBK) = 0 V |
20 | pF | ||||
| RID | Differential input resistance | V(D) = 3 V, V(LBK) = 0 V | 40 | 105 | kΩ | |||
| RIN | Input resistance (CANH or CANL) | 20 | 55 | kΩ | ||||
| ICC | Supply current | Standby | V(RS) = VCC, V(D) = VCC, V(LBK) = 0 V | 200 | 700 | µA | ||
| Dominant | V(D) = 0 V, no load, V(RS) = 0 V, V(LBK) = 0 V | 6 | mA | |||||
| Recessive | V(D) = VCC, no load, V(RS) = 0 V, V(LBK) = 0 V | 6 | mA | |||||