ZHCSNJ2D July 2006 – March 2021 PCA9554
PRODUCTION DATA
- 1 特性
- 2 說明
- 3 Revision History
- 4 Description (Continued)
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
8.3.2.1 Device Address
Figure 8-6 shows the address byte for the PCA9554.
Figure 8-6 PCA9554 AddressTable 8-2 Address Reference
| INPUTS | I2C BUS SLAVE ADDRESS | ||
|---|---|---|---|
| A2 | A1 | A0 | |
| L | L | L | 32 (decimal), 20 (hexadecimal) |
| L | L | H | 33 (decimal), 21 (hexadecimal) |
| L | H | L | 34 (decimal), 22 (hexadecimal) |
| L | H | H | 35 (decimal), 23 (hexadecimal) |
| H | L | L | 36 (decimal), 24 (hexadecimal) |
| H | L | H | 37 (decimal), 25 (hexadecimal) |
| H | H | L | 38 (decimal), 26 (hexadecimal) |
| H | H | H | 39 (decimal), 27 (hexadecimal) |
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read is selected, while a low (0) selects a write operation.