ZHCSK60G October 2005 – March 2021 PCA9544A
PRODUCTION DATA
| STANDARD-MODE I2C BUS | FAST-MODE I2C BUS | UNIT | |||||
|---|---|---|---|---|---|---|---|
| MIN | MAX | MIN | MAX | ||||
| fscl | I2C clock frequency | 0 | 100 | 0 | 400 | kHz | |
| tsch | I2C clock high time | 4 | 0.6 | μs | |||
| tscl | I2C clock low time | 4.7 | 1.3 | μs | |||
| tsp | I2C spike time | 50 | 50 | ns | |||
| tsds | I2C serial-data setup time | 250 | 100 | ns | |||
| tsdh | I2C serial-data hold time | 0(1) | 0(1) | μs | |||
| ticr | I2C input rise time | 1000 | 20 + 0.1Cb (2) | 300 | ns | ||
| ticf | I2C input fall time | 300 | 20 + 0.1Cb (2) | 300 | ns | ||
| tocf | I2C output fall time (10-pF to 400-pF bus) | 300 | 20 + 0.1Cb (2) | 300 | ns | ||
| tbuf | I2C bus free time between stop and start | 4.7 | 1.3 | μs | |||
| tsts | I2C start or repeated start condition setup | 4.7 | 0.6 | μs | |||
| tsth | I2C start or repeated start condition hold | 4 | 0.6 | μs | |||
| tsps | I2C stop condition setup | 4 | 0.6 | μs | |||
| tvdL(Data) | Valid-data time (high to low)(3) | SCL low to SDA output low valid | 1 | 1 | μs | ||
| tvdH(Data) | Valid-data time (low to high)(3) | SCL low to SDA output high valid | 0.6 | 0.6 | μs | ||
| tvd(ack) | Valid-data time of ACK condition | ACK signal from SCL low to SDA output low | 1 | 1 | μs | ||
| Cb | I2C bus capacitive load | 400 | 400 | pF | |||