ZHCSTX5C August 2000 – January 2025 OPA627 , OPA637
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Pin Configuration and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Thermal Information: OPA627
- 5.5 Thermal Information: OPA637
- 5.6 Electrical Characteristics: OPA627BU,?OPA627AU
- 5.7 Electrical Characteristics: OPA627AM, OPA627BM, OPA627SM
- 5.8 Electrical Characteristics: OPA637
- 5.9 Typical Characteristics
- 6 Detailed Description
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|8
- LMC|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
6.3.8.1 EMIRR IN+ Test Configuration
Figure 6-9 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the op amp noninverting input terminal using a transmission line. The op amp is configured in a unity gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch at the op amp input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting DC offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that can interfere with multimeter accuracy. See also the EMI Rejection Ratio of Operational Amplifiers application note.
Figure 6-9 EMIRR IN+ Test Configuration Schematic