ZHCSRT4 august 2023 LV5144
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 說明（續）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Input Range (VIN)
- 8.3.2 Output Voltage Setpoint and Accuracy (FB)
- 8.3.3 High-Voltage Bias Supply Regulator (VCC)
- 8.3.4 Precision Enable (EN/UVLO)
- 8.3.5 Power Good Monitor (PGOOD)
- 8.3.6 Switching Frequency (RT, SYNCIN)
- 8.3.7 Configurable Soft Start (SS/TRK)
- 8.3.8 Voltage-Mode Control (COMP)
- 8.3.9 Gate Drivers (LO, HO)
- 8.3.10 Current Sensing and Overcurrent Protection (ILIM)
- 8.3.11 OCP Duty Cycle Limiter
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
9.4.1 Layout Guidelines
Proper PCB design and layout is important in a high-current, fast-switching circuits (with high current and voltage slew rates) to assure appropriate device operation and design robustness. As expected, certain issues must be considered before designing a PCB layout using the LV5144. The high-frequency power loop of the buck converter power stage is denoted by #1 in the shaded area of Figure 9-33. The topological architecture of a buck converter means that particularly high di/dt current flows in the components of loop 1, and it becomes mandatory to reduce the parasitic inductance of this loop by minimizing its effective loop area. Also important is the gate drive loops of the low-side and high-side MOSFETs, denoted by 2 and 3, respectively, in Figure 9-33.
Figure 9-33 DC/DC Regulator Ground System With Power Stage and Gate Drive Circuit Switching
Loops