A feed-forward capacitor (C_FF) can be connected from the V_OUT pin to the ADJ pin. C_FF improves transient, noise, and PSRR performance, but is not required for regulator stability. Recommended C_FF values are listed in the Recommended Operating Conditions table. A higher capacitance C_FF can be used; however, the start-up time increases. For a detailed description of C_FF tradeoffs, see the Pros and Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator application note.

C_FF and R₁ form a zero in the loop gain at frequency f_Z, whereas C_FF, R₁, and R₂ form a pole in the loop gain at frequency f_P. C_FF zero and pole frequencies can be calculated from the following equations:

For the legacy chip, a feed-forward capacitor (C_FF) of 7 pF is required, because this capacitor provides the lead compensation necessary for loop stability. Use a temperature-stable ceramic capacitor (NPO or COG type).

For the new chip, a C_FF ≥ 10 pF is required for stability only if the feedback divider current is less than 5 μA. The following equation calculates the feedback divider current.

To avoid start-up time increases from C_FF, limit the product C_FF × R₁ < 50 μs.

For an output voltage of 1.2 V with the ADJ pin tied to the V_OUT pin, no C_FF is used.