ZHCSF95C December 2015 – February 2018 LMR23610
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Fixed Frequency Peak Current Mode Control
- 7.3.2 Adjustable Output Voltage
- 7.3.3 EN/SYNC
- 7.3.4 VCC, UVLO
- 7.3.5 Minimum ON-Time, Minimum OFF-Time and Frequency Foldback at Dropout Conditions
- 7.3.6 Internal Compensation and CFF
- 7.3.7 Bootstrap Voltage (BOOT)
- 7.3.8 Overcurrent and Short-Circuit Protection
- 7.3.9 Thermal Shutdown
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Custom Design With WEBENCH® Tools
- 8.2.2.2 Output Voltage Setpoint
- 8.2.2.3 Switching Frequency
- 8.2.2.4 Inductor Selection
- 8.2.2.5 Output Capacitor Selection
- 8.2.2.6 Feed-Forward Capacitor
- 8.2.2.7 Input Capacitor Selection
- 8.2.2.8 Bootstrap Capacitor Selection
- 8.2.2.9 VCC Capacitor Selection
- 8.2.2.10 Undervoltage Lockout Setpoint
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDA|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDA|8
訂購信息
8.2.2.5 Output Capacitor Selection
Choose the output capacitor(s), COUT, with care because it directly affects the steady-state output voltage ripple, loop stability and the voltage over/undershoot during load current transients.
The output ripple is essentially composed of two parts. One is caused by the inductor current ripple going through the equivalent series resistance (ESR) of the output capacitors:
The other is caused by the inductor current ripple charging and discharging the output capacitors:
The two components in the voltage ripple are not in phase, so the actual peak-to-peak ripple is smaller than the sum of two peaks.
Output capacitance is usually limited by transient performance specifications if the system requires tight voltage regulation with presence of large current steps and fast slew rate. When a fast large load increase happens, output capacitors provide the required charge before the inductor current can slew up to the appropriate level. The regulator’s control loop usually needs six or more clock cycles to respond to the output voltage droop. The output capacitance must be large enough to supply the current difference for six clock cycles to maintain the output voltage within the specified range. Equation 15 shows the minimum output capacitance needed for specified output undershoot. When a sudden large load decrease happens, the output capacitors absorb energy stored in the inductor. which results in an output voltage overshoot. Equation 16 calculates the minimum capacitance required to keep the voltage overshoot within a specified range.
where
- KIND = Ripple ratio of the inductor ripple current (ΔiL / IOUT)
- IOL = Low level output current during load transient
- IOH = High level output current during load transient
- VUS = Target output voltage undershoot
- VOS = Target output voltage overshoot
For this design example, the target output ripple is 50 mV. Presuppose ΔVOUT_ESR = ΔVOUT_C = 50 mV, and chose KIND = 0.5. Equation 13 yields ESR no larger than 100 mΩ and Equation 14 yields COUT no smaller than 3.1 μF. For the target over/undershoot range of this design, VUS = VOS = 5% × VOUT = 250 mV. The COUT can be calculated to be no smaller than 54 μF and 8.5 μF by Equation 15 and Equation 16 respectively. Consider of derating, one 82 μF, 16 V ceramic capacitor with 5 mΩ ESR is used.