ZHCSP67A October 2021 – January 2022 LMK1D2106 , LMK1D2108
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.4.2 Input Termination
The LMK1D210x inputs can be interfaced with LVDS, LVPECL, HCSL, or LVCMOS drivers.
LVDS drivers can be connected to LMK1D210x inputs with DC and AC coupling as shown Figure 8-3 and Figure 8-4, respectively.
Figure 8-3 LVDS Clock Driver Connected to LMK1D210x Input (DC-Coupled)
Figure 8-4 LVDS Clock Driver Connected to LMK1D210x Input (AC-Coupled)Figure 8-5 shows how to connect LVPECL inputs to the LMK1D210x. The series resistors are required to reduce the LVPECL signal swing if the signal swing is >1.6 VPP.
Figure 8-5 LVPECL Clock Driver Connected to LMK1D210x InputFigure 8-6 shows how to couple a LVCMOS clock input to the LMK1D210x directly.
Figure 8-6 1.8-V, 2.5-V, or 3.3-V LVCMOS Clock Driver Connected to LMK1D210x Input
For unused input, TI recommends grounding both input pins (INP, INN) using 1-kΩ resistors.