ZHCSIC8B April 2016 – June 2018 LMH0324
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
The LMH0324 operates in one of two modes: System Management Bus (SMBus) or Serial Peripheral Interface (SPI) mode. In order to determine the mode of operation, the proper setting must be applied to the MODE_SEL pin at power-up, as detailed in Table 5.
| LEVEL | DEFINITION |
|---|---|
| H | Forced Power Save Mode, only SPI is enabled (all other circuitry powered down) |
| F | Select SPI Interface for register access |
| R | Reserved for factory testing – do not use |
| L | Select SMBus Interface for register access |
NOTE
Changing logic states between LEVEL-L and LEVEL-H after power up is not allowed.