ZHCSFT3D March 2015 – March 2017 LMG5200
PRODUCTION DATA.
| PIN | I/O(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AGND | 7 | G | Analog ground. Ground of driver device. |
| HB | 2 | P | High-side gate driver bootstrap rail. |
| HI | 4 | I | High-side gate driver control input |
| HS | 3 | P | High-side GaN FET source connection |
| LI | 5 | I | Low-side driver control input |
| PGND | 9 | G | Power ground. Low-side GaN FET source. Electrically shorted to AGND pin. |
| SW | 8 | P | Switching node. Electrically shorted to HS pin. Ensure low capacitance at this node on PCB. |
| VCC | 6 | P | 5-V positive gate drive supply |
| VIN | 1 | P | Input voltage pin. Electrically connected to high-side GaN FET drain. |