Generally, a good high frequency layout will keep
power supply and ground traces away from the inverting input and output pins.
Parasitic capacitances on these nodes to ground will cause frequency response
peaking and possible circuit oscillations. General high-speed, signal-path layout
suggestions include:
- Continuous ground planes are preferred for signal
routing with matched impedance traces for longer runs. However, open up both
ground and power planes around the capacitive sensitive input and output device
pins. After the signal is sent into a resistor, parasitic capacitance becomes
more of a bandlimiting issue and less of a stability issue.
- Use good, high-frequency decoupling capacitors
(0.1 μF) on the ground plane at the device power pins. For best high-frequency
decoupling, consider X2Y supply-decoupling capacitors that offer a much higher
self-resonance frequency over standard capacitors.
- When using differential signal routing over any appreciable distance, use microstrip layout techniques with matched impedance traces.
- The input summing junction is very sensitive to
parasitic capacitance. Connect any Rf, and Rg elements into the summing junction
with minimal trace length to the device pin side of the resistor. The other side
of these elements can have more trace length if needed to the source or to
ground.