ZHCSO42B December 2015 – July 2021 LM53625-Q1 , LM53635-Q1
PRODUCTION DATA
請參考 PDF 數據表獲取器件具體的封裝圖。
The BIAS pin is the input to the internal LDO. As mentioned in Section 8.3.8, this input is connected to VOUT in order to provide the lowest possible supply current at light loads. Because this input is connected directly to the output, it must be protected from negative voltage transients. Such transients may occur when the output is shorted at the end of a long PCB trace or cable. If this is likely in a given application, then place a small resistor in series between the BIAS input and VOUT, as shown in Figure 9-4. Size the resistor to limit the current out of the BIAS pin to < 100 mA. Values in the range of 2 Ω to 5 Ω are usually sufficient. Values greater than 5 Ω are not recommended. As a rough estimate, assume that the full negative transient will appear across RBIAS and design for a current of < 100 mA. In severe cases, a Schottky diode can be placed in parallel with the output to limit the transient voltage and current.
When a resistor is used between the output and the BIAS pin, a 0.1-μF capacitor is required close to the BIAS pin. In general, TI recommends having a 0.1-μF capacitor near the BIAS pin, regardless of the presence or not of the resistor, unless the trace between the output capacitors and the BIAS pin is very short.
The typical current into the bias pin is 15 mA when the device is operating in PWM mode at 2.1 MHz.