ZHCSHU0C March 2018 – October 2021 LM51501-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Enable (EN Pin)
- 8.3.2 High Voltage VCC Regulator (PVCC, AVCC Pin)
- 8.3.3 Power-On Voltage Selection (VSET Pin)
- 8.3.4 Switching Frequency (RT Pin)
- 8.3.5 Clock Synchronization (SYNC Pin in SS Configuration)
- 8.3.6 Current Sense, Slope Compensation, and PWM (CS Pin)
- 8.3.7 Current Limit (CS Pin)
- 8.3.8 Feedback and Error Amplifier (COMP Pin)
- 8.3.9 Automatic Wake-Up and Standby
- 8.3.10 Boost Status Indicator (STATUS Pin)
- 8.3.11 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
- 8.3.12 MOSFET Driver (LO Pin)
- 8.3.13 Thermal Shutdown
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Design Requirements
- 9.2.2
Detailed Design Procedure
- 9.2.2.1 Custom Design With WEBENCH? Tools
- 9.2.2.2 RSET Resistor
- 9.2.2.3 RT Resistor
- 9.2.2.4 Inductor Selection (LM)
- 9.2.2.5 Current Sense (RS)
- 9.2.2.6 Slope Compensation Ramp (RSL)
- 9.2.2.7 Output Capacitor (COUT)
- 9.2.2.8 Loop Compensation Component Selection and Maximum ESR
- 9.2.2.9 PVCC Capacitor, AVCC Capacitor, and AVCC Resistor
- 9.2.2.10 VOUT Filter (CVOUT, RVOUT)
- 9.2.2.11 Input Capacitor
- 9.2.2.12 MOSFET Selection
- 9.2.2.13 Diode Selection
- 9.2.2.14 Efficiency Estimation
- 9.2.3 Application Curves
- 9.3 System Examples
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.11 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
When designing a boost converter, the maximum duty cycle should be reviewed at the minimum supply voltage. The minimum input supply voltage which can achieve the target output voltage is estimated from Equation 9.
where
- ISUPPLY(MAX) is the maximum input current.
- RDCR is the DC resistance of the inductor.
- and RDS(ON) is the on-resistance of the MOSFET.
Substitute FSW_RT for FSYNC if clock synchronization is not used. The minimum input supply voltage can be decreased by supplying FSYNC because it is less than FSW_RT.
This maximum duty cycle limit (DMAX) is 87% (typical), but may fall down below 80% if the external synchronization clock frequency is higher than 0.85 × FSW (TYPICAL). Select an FSYNC that is within –25% and –15% of the FSW (TYPICAL) if 1:5 step-up ratio is required for clock synchronization. The minimum input supply voltage can be further decreased by supplying a lower frequency external synchronization clock. See Section 8.3.5 for more information.