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ZHCSGU1C September 2017 – October 2021 LM5150-Q1

PRODUCTION DATA

封裝選項

請參考 PDF 數據表獲取器件具體的封裝圖。

機械數據 (封裝 | 引腳)

RUM|16

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

7.5 Electrical Characteristics

Typical values correspond to T_J = 25°C. Minimum and maximum limits apply over T_J = –40°C to 125°C. Unless otherwise stated, V_VOUT = 6.8 V, R_T = 9.09 kΩ

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY CURRENT
I_{SHUTDOWN(VOUT)}	VOUT shutdown current	V_VOUT = 12 V, V_EN = 0 V		5	12	μA
I_{STANDBY(VOUT)}	VOUT standby current (PVCC in regulation, STATUS is low)	V_VOUT = 12 V, V_EN = 3.3 V, R_SET = 90.9 kΩ		15	25	μA
I_WAKEUP(VOUT)	VOUT operating current (exclude current into RT resistor)	V_VOUT = 10.5 V, V_EN = 2.5 V, non-switching, R_T = 9.09 kΩ		1.2	2.0	mA
I_{SHUTDOWN(VIN)}	VIN shutdown current	V_VIN = 12 V, V_EN = 0 V		0.1	0.5	μA
I_STANDBY(VIN)	VIN standby current	V_VIN = 12 V, V_EN = 3.3 V, R_SET = 29.4 kΩ		0.1	0.5	μA
I_WAKEUP(VIN)	VIN operating current	V_VIN = 10.5 V, V_EN = 2.5 V, non-switching, R_T = 9.09 kΩ		30	45	μA
VCC REGULATOR
V_{VCC-REG-NOLOAD}	PVCC regulation	V_VOUT = 6.0 V, No load, wake-up mode	4.75	5	5.25	V
V_{VCC-REG-FULLLOAD}	PVCC regulation	V_VOUT = 5.0 V, I_PVCC = 70 mA	4.5	4.8		V
V_{VCC-UVLO-RISING}	AVCC UVLO threshold	AVCC rising	4.1	4.3	4.5	V
V_{VCC-UVLO-FALLING}	AVCC UVLO threshold	AVCC falling	3.9	4.1	4.3	V
V_VCC-UVLO-HYS	AVCC UVLO hysteresis			0.2		V
I_VCC-CL	PVCC sourcing current limit	V_PVCC = 0 V, wake-up mode	75			mA
ENABLE
V_EN-RISING	Enable threshold	EN rising		1.7	2	V
V_EN-FALLING	Enable threshold	EN falling	1	1.3		V
I_EN	EN bias current	V_EN = 42 V			100	nA
6.8-V SETTING
V_VOUT-REG	VOUT regulation target	R_SET = 29.4 kΩ or 90.9 kΩ	6.66	6.80	6.98	V
V_VOUT-WAKEUP	VOUT wake-up threshold (V_VOUT-REG + 3%)	R_SET = 29.4 kΩ or 90.9 kΩ, VOUT falling	6.83	7.00	7.14	V
V_{VOUT-STANDBY1}	VOUT standby threshold (V_VOUT-REG + 6%, EC config)	R_SET = 90.9 kΩ, VOUT rising	7.02	7.21	7.35	V
V_{VOUT-STATUS-OFF}	VOUT status off threshold (V_VOUT-REG + 12%, EC config)	R_SET = 90.9 kΩ, VOUT rising	7.42	7.62	7.81	V
V_{VOUT-STANDBY2}	VOUT standby threshold (V_VOUT-REG + 24%, SS config)	R_SET = 29.4 kΩ, VOUT rising	8.22	8.43	8.60	V
V_VIN-STANDBY	VIN standby threshold (V_VOUT-WAKEUP + 1.0 V, SS config)	R_SET = 29.4 kΩ, VIN rising	7.82	8.00	8.19	V
7.5-V SETTING
V_VOUT-REG	VOUT regulation target	R_SET = 19.1 kΩ or 71.5 kΩ	7.37	7.50	7.67	V
V_VOUT-WAKEUP	VOUT wake-up threshold (V_VOUT-REG + 3%)	R_SET = 19.1 kΩ or 71.5 kΩ, VOUT falling	7.52	7.73	7.88	V
V_{VOUT-STANDBY1}	VOUT standby threshold (V_VOUT-REG + 6%, EC config)	R_SET = 71.5 kΩ, VOUT rising	7.74	7.95	8.11	V
V_{VOUT-STATUS-OFF}	VOUT status off threshold (V_VOUT-REG + 12%, EC config)	R_SET = 71.5 kΩ, VOUT rising	8.19	8.40	8.61	V
V_{VOUT-STANDBY2}	VOUT standby threshold (V_VOUT-REG + 24%, SS config)	R_SET = 19.1 kΩ, VOUT rising	9.07	9.30	9.46	V
V_VIN-STANDBY	VIN standby threshold (V_VOUT-WAKEUP + 1.0 V, SS config)	R_SET = 19.1 kΩ, VIN rising	8.50	8.73	8.93	V
8.5-V SETTING
V_VOUT-REG	VOUT regulation target	R_SET = 9.53 kΩ or 54.9 kΩ	8.37	8.50	8.69	V
V_VOUT-WAKEUP	VOUT wake-up threshold (V_VOUT-REG + 3%)	R_SET = 9.53 kΩ or 54.9 kΩ, VOUT falling	8.52	8.76	8.93	V
V_{VOUT-STANDBY1}	VOUT standby threshold (V_VOUT-REG + 6%, EC config)	R_SET = 54.9 kΩ, VOUT rising	8.78	9.01	9.19	V
V_{VOUT-STATUS-OFF}	VOUT status off threshold (V_VOUT-REG + 12%, EC config)	R_SET = 54.9 kΩ, VOUT rising	9.28	9.52	9.75	V
V_{VOUT-STANDBY2}	VOUT standby threshold (V_VOUT-REG + 24%, SS config)	R_SET = 9.53 kΩ, VOUT rising	10.29	10.54	10.72	V
V_VIN-STANDBY	VIN standby threshold (V_VOUT-WAKEUP + 1.0 V, SS config)	R_SET = 9.53 kΩ, VIN rising	9.50	9.76	9.98	V
10.5-V SETTING
V_VOUT-REG	VOUT regulation target	R_SET = GND or 41.2 kΩ	10.31	10.50	10.75	V
V_VOUT-WAKEUP	VOUT wake-up threshold (V_VOUT-REG + 3%)	R_SET = GND or 41.2 kΩ, VOUT falling	10.53	10.82	11.02	V
V_{VOUT-STANDBY1}	VOUT standby threshold (V_VOUT-REG + 6%, EC config)	R_SET = 41.2 kΩ, VOUT rising	10.84	11.13	11.33	V
V_{VOUT-STATUS-OFF}	VOUT status off threshold (V_VOUT-REG + 12%, EC config)	R_SET = 41.2 kΩ, VOUT rising	11.46	11.76	12.04	V
V_{VOUT-STANDBY2}	VOUT standby threshold (V_VOUT-REG + 24%, SS config)	R_SET = GND, VOUT rising	12.70	13.02	13.24	V
V_VIN-STANDBY	VIN standby threshold (V_VOUT-WAKEUP + 1.0 V, SS config)	R_SET = GND, VIN rising	11.47	11.82	12.11	V
RT
V_RT-REG	RT regulation voltage			1.2		V
CLOCK SYNCHRONIZATION
V_SYNC-RISING	SYNC rising threshold			2.0	2.4	V
V_SYNC-FALLING	SYNC falling threshold		0.4	1.5		V
PULSE WIDTH MODULATION AND OSCILLATOR
F_SW1	Switching frequency	R_T = 93.1 kΩ	204	239	270	kHz
F_SW2	Switching frequency	R_T = 9.09 kΩ	2100	2300	2500	kHz
F_SW3	Switching frequency	R_T = 9.09 kΩ, F_SYNC = 2.0 MHz		2000		kHz
T_ON-MIN	Forced minimum on time	SS config, V_COMP = 0 V	30	50	70	ns
D_MIN	Minimum duty cycle limit (EC config)	R_T = 9.09 kΩ, V_VIN = 1.5 V, V_VOUT = 6.8 V, V_COMP = 0 V		60%
D_MIN	Minimum duty cycle limit (EC config)	R_T = 93.1 kΩ, V_VIN = 8.4 V, V_VOUT = 10.5 V, V_COMP = 0 V		16%
D_MAX	Maximum duty cycle limit	SS config, R_T = 9.09 kΩ	83%	87%	91.5%
D_MAX	Maximum duty cycle limit	EC config, R_T = 93.1 kΩ	83%	87%	91.5%
CURRENT SENSE
V_CSTH	Current limit threshold (CS-AGND)⁽¹⁾	V_VIN = 5.1 V, V_VOUT = 6.8 V at 25% DC	102	120	138	mV
		V_VIN = 3.4 V, V_VOUT = 6.8 V at 50% DC	102	120	138	mV
		V_VIN = 1.7 V, V_VOUT = 6.8 V at 75% DC	102	120	138	mV
ERROR AMPLIFIER
Gm	Transconductance			2		mA/V
	COMP souring current	V_COMP = 0 V	312			μA
	COMP sinking current	V_COMP = 1.5 V	120			μA
	COMP clamp voltage		2.4	2.6		V
	COMP to PWM offset			0.3		V
STATUS
	Low-state voltage drop	1-mA sinking		0.1		V
	STATUS rise to LO delay	5-k? pullup to 5 V	4	5	6	μs
MOSFET DRIVER
	High-state voltage drop	50-mA sinking		0.075		V
	Low-state voltage drop	50-mA sourcing		0.055		V
THERMAL SHUTDOWN (TSD)
	Thermal shutdown threshold	Temperature rising		175		°C
	Thermal shutdown hysteresis			15		°C

(1) V_CL at the current limit comparator input is 10 x V_CSTH