ZHCSLO6A December 2020 – January 2023 LM5149
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 說明（續）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Input Voltage Range (VIN)
- 8.3.2 High-Voltage Bias Supply Regulator (VCC, VCCX, VDDA)
- 8.3.3 Precision Enable (EN)
- 8.3.4 Power-Good Monitor (PG)
- 8.3.5 Switching Frequency (RT)
- 8.3.6 Active EMI Filter
- 8.3.7 Dual Random Spread Spectrum (DRSS)
- 8.3.8 Soft Start
- 8.3.9 Output Voltage Setpoint (FB)
- 8.3.10 Minimum Controllable On Time
- 8.3.11 Error Amplifier and PWM Comparator (FB, EXTCOMP)
- 8.3.12 Slope Compensation
- 8.3.13 Inductor Current Sense (ISNS+, VOUT)
- 8.3.14 Hiccup Mode Current Limiting
- 8.3.15 High-Side and Low-Side Gate Drivers (HO, LO)
- 8.3.16 Output Configurations (CNFG)
- 8.3.17 Single-Output Dual-Phase Operation
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Applications
- 9.2.1
Design 1 – High-Efficiency 2.1-MHz Synchronous
Buck Regulator
- 9.2.1.1 Design Requirements
- 9.2.1.2
Detailed Design Procedure
- 9.2.1.2.1 Custom Design With WEBENCH? Tools
- 9.2.1.2.2 Custom Design With Excel Quickstart Tool
- 9.2.1.2.3 Buck Inductor
- 9.2.1.2.4 Current-Sense Resistance
- 9.2.1.2.5 Output Capacitors
- 9.2.1.2.6 Input Capacitors
- 9.2.1.2.7 Frequency Set Resistor
- 9.2.1.2.8 Feedback Resistors
- 9.2.1.2.9 Compensation Components
- 9.2.1.3 Application Curves
- 9.2.2 Design 2 – High Efficiency 48-V to 12-V 400-kHz Synchronous Buck Regulator
- 9.2.3 Design 3 – High Efficiency 440-kHz Synchronous Buck Regulator
- 9.2.4 Design 4 – Dual-Phase 400-kHz 20-A Synchronous Buck Regulator
- 9.2.1
Design 1 – High-Efficiency 2.1-MHz Synchronous
Buck Regulator
- 9.3 Power Supply Recommendations
- 9.4 Layout
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
9.2.1.2.6 Input Capacitors
A power supply input typically has a relatively high source impedance at the switching frequency. Good-quality input capacitors are necessary to limit the input ripple voltage. In general, the ripple current splits between the input capacitors based on the relative impedance of the capacitors at the switching frequency.
- Select the input capacitors with sufficient voltage and RMS ripple current ratings.
- Use Equation 42 to calculate the input capacitor RMS ripple
current assuming a worst-case duty-cycle operating
point of 50%. Equation 42.
- Use Equation 43 to find the required input capacitance.
Equation 43.
where
- ΔVIN is the input peak-to-peak ripple voltage specification.
- RESR is the input capacitor ESR.
- Recognizing the voltage coefficient of ceramic capacitors, select two 10-μF, 50-V, X7R, 1210 ceramic input capacitors. Place these capacitors adjacent to the power MOSFETs. See Power Stage Layout for more detail.
- Use four 10-nF, 50-V, X7R, 0603 ceramic capacitors near the high-side MOSFET to supply the high di/dt current during MOSFET switching transitions. Such capacitors offer high self-resonant frequency (SRF) and low effective impedance above 100 MHz. The result is lower power loop parasitic inductance, thus minimizing switch-node voltage overshoot and ringing for lower conducted and radiated EMI signature. Refer to Layout Guidelines for more detail.