ZHCSLJ6A June 2021 – June 2021 LM5145-Q1
PRODUCTION DATA
Figure 9-5 shows the schematic diagram of a 5-V, 12-A buck regulator with a switching frequency of 300 kHz. In this example, the target efficiencies are 94% and 92% at input voltages of 24 V and 48 V, respectively. The input UVLO is set to turn on and off at 8 V and 7 V, respectively. The switching frequency is set by means of a synchronization input signal at 300 kHz, and the free-running switching frequency (in the event that the synchronization signal is removed) is set at 250 kHz by resistor RRT. In terms of control loop performance, the target loop crossover frequency is 40 kHz with a phase margin greater than 50°. The output voltage soft-start time is 6 ms.
This and subsequent design examples are provided herein to showcase the LM5145-Q1 controller in several different applications. Depending on the source impedance of the input supply bus, an electrolytic capacitor may be required at the input to ensure stability, particularly at low input voltage and high output current operating conditions. See Section 10 for more detail.