Table 3. Design Parameters

8.2.2.1 Input-to-Output Logic

The design should specify which type of input-to-output configuration should be used. If turning on the power MOSFET when the input signal is in high state is preferred, then the noninverting configuration must be selected. If turning off the power MOSFET when the input signal is in high state is preferred, the inverting configuration must be chosen. The LM5134 device can be configured in either an inverting or noninverting input-to-output configuration, using the IN– or IN+ pins, respectively. To configure the device for use in inverting mode, tie the IN+ pin to VDD and apply the input signal to the IN– pin. For the noninverting configuration, tie the IN– pin to GND and apply the input signal to the IN+ pin.

8.2.2.2 Input Threshold Type

The type of controller used determines the input voltage threshold of the gate driver device. The LM5134B device features a TTL and CMOS-compatible input threshold logic, with wide hysteresis. The threshold voltage levels are low voltage and independent of the VDD supply voltage, which allows compatibility with both logic-level input signals from microcontrollers, as well as higher-voltage input signals from analog controllers.

The LM5134A device features higher voltage thresholds for greater noise immunity, and controllers with higher drive voltages.

See Electrical Characteristics for the actual input threshold voltage levels and hysteresis specifications for the LM5134 device.

8.2.2.3 V_DD Bias Supply Voltage

The bias supply voltage applied to the VDD pin of the device should never exceed the values listed in Recommended Operating Conditions. However, different power switches demand different voltage levels to be applied at the gate terminals for effective turnon and turnoff. With an operating range from 4 V to 12 V, the LM5134 device can be used to drive a variety of power switches, such as Si MOSFETs (for example,
VGS = 4.5 V, 10 V, 12 V), BJTs, and wide-band gap power semiconductors (such as GaN, certain types of which allow no higher than 6 V to be applied to the gate terminals).

8.2.2.4 Peak Source and Sink Currents

Generally, to minimize switching power losses, the switching speed of the power switch during turnon and turnoff should be as fast as possible. However, very fast transitions on the Drain node voltage can lead to unwanted emissions for EMI, and the turnon speed is often deliberately slowed down by placing a series resistor between the Drive output and MOSFET gate to reduce these emissions.

The speed at which the drain node rises during turnoff is typically dictated by the current in the inductor at turnoff, and thus is not dependent on the turnoff current of the drive circuit. However, depending on the amount of current flowing through the drain to gate capacitance of the MOSFET as the drain voltage rises and the impedance to ground of the drive circuit, it is possible for the gate voltage to exceed the threshold voltage of the FET and turn the FET back on, known as a false turnon.

For these reasons, turn the FET off as fast as possible. The LM5134 allows the flexibility of different turnon and turnoff speeds, and avoids false turnon by providing a pilot output to drive a small pulldown MosFET, which can be placed close to the main FET and reduces the impedance from gate to ground on turnoff.

Using the example of a power MOSFET, the system requirement for the switching speed is typically described in terms of the slew rate of the drain-to-source voltage of the power MOSFET (such as dV/dt). For example, the system requirement might state that a SPP20N60C3 power MOSFET must be turned on with a dV/dt of 20 V/ns or higher, under a DC bus voltage of 400 V in a continuous-conduction-mode (CCM) boost PFC converter application. This type of application is an inductive hard-switching application, and reducing switching power losses is critical. This requirement means that the entire drain-to-source voltage swing during power MOSFET turnon event (from 400 V in the OFF state to V DS(on) in on state) must be completed in approximately 20 ns or less. When the drain-to-source voltage swing occurs, the Miller charge of the power MOSFET (QGD parameter in SPP20N60C3 power MOSFET data sheet = 33 nC typical) is supplied by the peak current of gate driver. According to the power MOSFET inductive switching mechanism, the gate-to-source voltage of the power MOSFET at this time is the Miller plateau voltage, which is typically a few volts higher than the threshold voltage of the power MOSFET, VGS(TH). To achieve the targeted dV/dt, the gate driver must be capable of providing the QGD charge in 20 ns or less. In other words, a peak current of 1.65 A (= 33 nC / 20 ns) or higher must be provided by the gate driver. The LM5134 gate driver is capable of providing 4.5-A peak sourcing current, which exceeds the design requirement and has the capability to meet the switching speed needed. The 2.7x overdrive capability provides an extra margin against part-to-part variations in the QGD parameter of the power MOSFET, along with additional flexibility to insert external gate resistors and fine tune the switching speed for efficiency versus EMI optimizations.

However, in practical designs the parasitic trace inductance in the gate drive circuit of the PCB will have a definitive role to play on the power MOSFET switching speed. The effect of this trace inductance is to limit the dI/dt of the output current pulse of the gate driver. To illustrate this, consider output current pulse waveform from the gate driver to be approximated to a triangular profile, where the area under the triangle ( ½ × I PEAK × time) would equal the total gate charge of the power MOSFET (QG parameter in SPP20N60C3 power MOSFET datasheet = 87 nC typical). If the parasitic trace inductance limits the dI/dt, then a situation may occur in which the full peak current capability of the gate driver is not fully achieved in the time required to deliver the QG required for the power MOSFET switching. In other words, the time parameter in the equation would dominate and the I PEAK value of the current pulse would be much less than the true peak current capability of the device, while the required QG is still delivered. Because of this, the desired switching speed may not be realized, even when theoretical calculations indicate the gate driver is capable of achieving the targeted switching speed. Thus, placing the gate driver device very close to the power MOSFET and designing a tight gate drive-loop with minimal PCB trace inductance is important to realize the full peak-current capability of the gate driver.

The LM5134 is capable of driving a small FET local to the Gate of the main MOSFET to reduce the impact of this parasitic inductance and achieve the high dV/dt required on turnoff. The nominal gate voltage plateau of the SPP20N60C3 is given as 5.5 V. Thus to achieve the required sink current of 1.65 A would require an Rds_on of 3.3 Ω for the pilot FET. Lower on resistance gives further margin in the turnoff speed as described above, and reduces the potential for false turnon.

8.2.2.5 Enable and Disable Function

Certain applications demand independent control of the output state of the driver, without involving the input signal. A pin offering an enable and disable function achieves this requirement. The LM5134 device offers two input pins, IN+ and IN – , both of which control the state of the output as listed in Table 2. Based on whether an inverting or noninverting input signal is provided to the driver, the appropriate input pin can be selected as the primary input for controlling the gate driver. The other unused input pin can be used for the enable and disable functionality. If the design does not require an enable function, the unused input pin can be tied to either the VDD pin (in case IN+ is the unused pin), or GND (in case IN – is unused pin) to ensure it does not affect the output status.

8.2.2.6 Propagation Delay

The acceptable propagation delay from the gate driver is dependent on the switching frequency at which it is used, and the acceptable level of pulse distortion to the system. The LM5134 device features industry best-in-class 17-ns (typical) propagation delays, which ensure very little pulse distortion and allow operation at very high frequencies. See Electrical Characteristics for the propagation and switching characteristics of the LM5134 device.

8.2.2.7 PILOT MOSFET Selection

In general, a small-sized 20-V MOSFET with logic level gates can be used as the external turnoff switch. To achieve a fast switching speed and avoid the potential shoot-through, select a MOSFET with the total gate charge less than 3 nC. Verify that no shoot-through occurs for the entire operating temperature range. In addition, a small Rds(on) is preferred to obtain the strong sink current capability. The power losses of the PILOT MOSFET can be estimated in Equation 1.